Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

About ECC implementation in FPGA

Thread starter I_am_mYthorON
Start date Jan 13, 2005

Status: Not open for further replies.

Jan 13, 2005

#1

I_am_mYthorON

Newbie level 3

I want to build a 22bit-ECC engine for 512byte data. This ECC is based on the hamming code. Anybody had the experience? I hope to talke with you.

Status: Not open for further replies.

Similar threads

S
PLL implementation through FPGA
- Started by sushl
- Dec 6, 2023
- Replies: 6
PLD, SPLD, GAL, CPLD, FPGA Design
E
DSP slices in FPGA
- Started by engr_joni_ee
- Apr 3, 2024
- Replies: 1
PLD, SPLD, GAL, CPLD, FPGA Design
R
problem of fpga
- Started by rllv24
- Mar 24, 2024
- Replies: 3
PLD, SPLD, GAL, CPLD, FPGA Design
A
PCIe power supply in FPGA
- Started by aminpix
- Oct 31, 2023
- Replies: 1
PLD, SPLD, GAL, CPLD, FPGA Design
K
What's the difference between RAM and ROM with a coe files in Xilinx FPGA?
- Started by kevinwang65
- Mar 11, 2024
- Replies: 13
PLD, SPLD, GAL, CPLD, FPGA Design

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.

Accept Learn more…

Top