Reference Plane and Return path

Hi all,

what is the relationship between trace impedance and reference plane? how the trace impedance depends on reference plane? how it works?
Also what is the difference between reference plane and return path?
The VCC plane can be used for a signal return path? How it works?

Thanks in advance.

Regards,
Ahar

Hi!

The trace (characteristic) impedance is defined by the trace and the reference plane(s). This impedance can be calculated using equations which depends on width of the trace, distance frolm reference and so on. Once the trace impedance has been calculated, the trace is called a transmission line and transmission line theory can be applied.

The return path is (mostly) the current path which lies in the reference plane, just beneath the trace

The VCC plane can be used as a reference , since it is shorted to the GND planes on AC frequencies through capacitors

Hope this helps!

cheers

Have a look around Polar Instruments site.
Also
Microstrip - Wikipedia, the free encyclopedia
Stripline - Wikipedia, the free encyclopedia
The VCC and GND planes are NEVER shorted! There will always be some capactive and inductive impedance at A.C. frequencies and some resistance.

The VCC and GND planes are NEVER shorted! There will always be some capactive and inductive impedance at A.C. frequencies and some resistance.

Click to expand...

True indeed. But, considering a continuous VCC plane, do you think, that the said impedances will have an considerable impact on the transmission line parameters, other than a slightly increased dispersion?

No, as long as it is a continous plane. We try to use stripline as it is very rare now that our planes are continous, due to multiple different voltage requirements, and the isolation of same voltage plane with ferrite beads and pi filters to limit noise. Crossing these slots will cause more problems than dispersion, which is why we try to keep all critical signals as stripline, well at the frequencies I've worked at so far.

Stripline vs. Microstrip shouldn't matter. If you're "jumping the gap" between two reference planes with a signal (or even jumping over a void in the same plane) you will cause impedance problems. How critical this is goes up with signal frequency.

Best bet is to keep the same plane reference under the entire length of the signal. If you MUST cross planes (and a via to the other side of the board counts as crossing if the 'other' plane is now closer--i.e. you don't have multiple GND planes) then you should put a bypass cap between the two reference planes as close to the crossing as possible. This will tie the two planes together from an AC point of view but not DC, of course. AC return currents can travel through the capacitor, instead of taking a long, noisy, inductive path somewhere random on the board.

An excellent reply, it is something we didn't really think about until recently. Our problem is an engineering preference for isolating a voltage into several islands with a pi filter between each.
Having had some outside advice from one of our partners, about the problems this caused, they did recommend having the ground plane between the split plane and the signal would ease the problem.
Reading your reply and Henry Ott's 'Electromagnetic Compatibility Engineering' (P627-630 are good) adds more things to think about with high speed design.
I am still unsure about striplines, as H. Ott only mentions adjacent layers, if you have two contiguous ground planes above and below, the signal will couple to these planes with no E or H fields extending beyond the planes?
I would be interested in any information or data on how much noise and problems this adds.
More food for thought.

If you are segregating you power with filters for noise, you may also want to slice up your ground plane with partial cuts that leave an isthmus just under the pi filter. It forces the return current thru that point. Of course this can cause trickiness if you i/o needs to move between voltage regions. In order to 'mind the gap' you could route the signals over the gnd isthmus too. Of course you could make the isthmus and pi network be near the inter-region I/O to make routing sane. May lead to A->B->C pi networks rather than A->B, A->C. Obviously ANY GND plane is preferable to none.

As long as any critical impedances are kept, more good, solid GND surrounding the signal should only help. Make sure there are plenty of GND vias near so that GND truly is GND. A solid GND plane should provide protection above and below (and on the sides for coplanar gnd pour or vias) from other signals and noisy power.

I'd also recommend high speed digital design books/classes from Howard Johnson. I believe he does a class in Oxford once a year. Been meaning to take the classes myself, as I get my info third hand (so take my recommendations with a grain of salt.)