Question about level shifting in CMOS

Level Shifting in CMOS

Hello

Question about level shifting in CMOS

Would you use a source follower everywhere or just resize tranistors so that the VDS changes and then changes your common mode levels ?

I have heard source followers in CMOS are garbage (poor gain, frequency response) and plus CMOS does not have the built in VBE that bipolar does.

application is current steering logic but also any other CMOS interconnection block.

Any thoughts or experience in this ?

Re: Level Shifting in CMOS

I think you cannot adjust VDS by sizing the transistor because the output voltage VDS is very sensitive to the size of the transistor (if you operate it in open loop) or the level is determined only by external circuits, not the transistor itself (If you work in closed-loop)

Well Design CMOS source follower can provide quite good performance if you have enough supply voltage. Remember to use the transistor that have built-in well (e.g. PMOS level shifting transistor in N-well tech.), and connect the source to its body to reduce the body effect distortion.

Of course, the source follower can only provided gain <1 (near 1 if well design). But usually the purpose of source follower is to provide level shift (with less gain loss) or buffer output, so high gain is no use in source follower. What important is the current driving capability.

Re: Level Shifting in CMOS

the voltage gain of source folloer is less than 0dB because the out put voltage shall be devided by source resistance/( source resistance+1/conductance of MOS)
but u can shink current so means power gain is bigger
for level shifting you can use source folloer but for RF circuitry i do not use source follower i adust the dc voltage between gate and drain so as to get always same bias.
from experience it is not easy to get matching source follower and gateinput this is another reason why i do not use source follower

Re: Level Shifting in CMOS

so if you cascade say high speed logic, then you set your dc bias points say at your gate drain outputs to feed the dc bias into the next stage ?

that means your input dc bias is equal to your output dc bias ?

isn't that difficult to do ?

Level Shifting in CMOS

Could you consider to use a amplifier to realize the level shift function? The character of amplifier is good. But the structure is complex.