Doubts about ac and dc loadlines in the output characteristics of a BJT

Hi, I'm studying output amplifier stages, specifically class A power amplifiers.

I though I knew the meaning of the loadline but evidently I'm wrong.
In the input loop the biasing determines the output curve of the output characteristics, right?
It doesn't determines the exact point. The latter is determined by the intersection of this curve and the loadline which, in order, is determined by Vcc, Rc (+Rload).
If I have a BJT amp with a transformer on output stage, with a resistive load connected at the secondary, it offers different values of the resistance at dc and at ac.
The resistance seen at dc by the output loop is the only little primary resistance (modeling the resistive losses of the primary), and in ac the transformer offers n^2 that resistance , where n is the loop ratio of the transformer.
I'm expecting a new loadline starting from the same point of the Vce axis (value = Vcc) and ending on the Ic axis in a much lower point, thus setting another loadline very different from the dc one.
My study notes instead, say that the new load lines rotates around the Q bias point previously determined by the dc loadline.
My question is: how is it possible that the ac loadline changes its intersections with the axes AND continues passing on the same Q point?
Thanks in advance

Quote: My question is: how is it possible that the ac loadline changes its intersections with the axes AND continues passing on the same Q point?
Do you have doubts? Why?
Of course, the operating point (Q point) is fixed. However, when the current Ic changes sinusoidal the effective load resistance is larger than the primary wire resistance and, hence, the voltage swing around the bias point is larger (ohms law) - if compared with the dc case. This is equivalent to a load line that crosses the bias point but has a smaller slope.

This is my doubt: if the loadline is determined by the intersection points with the Vce and the Ic axis, and the Vce intersection is Vcc in the dc and (I presume) ac case, while the Ic axis intersection is Vcc/Rc in the dc case and Vcc/(Rc||Rload) in the ac case, then why the ac and the dc loadlines both pass through the same Q point in the plane?

The DC bias point will determine the quiescent operating point. You then draw a line through this point with the same slope that you would have gotten if the resistive load was presented to the transistor without the transformer (the resistance seen on the port of the transformer towards the transistor. This is also the method used if there is a resistor to the Vcc on the transistor and then the output is capacitively coupled to another load resistor. In this case the slope of the combined case is the parallel resistance of the resistors on both sides of the coupling capacitor.

In the old days of valves/tubes, the load resistance was very high (such as 100k, because the input impedance of such devices is meg ohms.) and the parallel combination of the resistor to B+ and the 100k was for practical purposes that of the resistor to the B+.

Tadde - your assumption is false: ...if the loadline is determined by the intersection points with the Vce and the Ic axis, and the Vce intersection is Vcc in the dc and (I presume) ac case.

The ac loadline does NOT intersect the Vce axis at the same voltage as in the dc case.

u guys are doin a great job here!

Then how do I determine the intersection of the ac loadline with the Vce and Ic axis? The ac equivalent circuit of the output loop obviously has not indipendent generators in it. I have (in the "counterclockwise" direction) : ground -> (Rc||Rload) -> vce -> ground

Tadde said:

Then how do I determine the intersection of the ac loadline with the Vce and Ic axis? The ac equivalent circuit of the output loop obviously has not indipendent generators in it. I have (in the "counterclockwise" direction) : ground -> (Rc||Rload) -> vce -> ground

Click to expand...

The best and most simple way is to draw a line through the Q point with the corect slope (corresponding to effective load resistance). Thats all. Don`t be surprised about the intersection with the Vce axis - recall the operation of a conductor (induction, overvoltage).