fassage
Newbie level 3
Forgive this quasi-blog, but id love to hear your personal experience, opposing opinions or simply a good debate about this subject that has been asked time & time again !
I have over 15 years analog/rf IC design experience, and once upon a time (many years ago) I would always have a handy excel sheet with the following rough constants (Kn,Kp Vtp, Vtn, Van,Vap) for different types/variations of devices in a given technology (450nm+) which would be useful enough to get within 10-20% of BSIM3 simulation results using the approximated empirical hand-calculation equations we have all been taught.
In more recent technologies (sub-90nm & especially ones using BSIM4), I have tried to characterise these constants but the inter-dependencies have so many factors, that makes it impossible to have a set of useful numbers to play with (ie there are no constants). In this context (& my opinion), actually performing hand calculations is thus a complete waste of time.
One is better of using these empirical formulas (that have not evolved as rapidly), to gain a general appreciation (rough guide) to W/L sizing in order to achieve circuit performances, rather than true old fashion designing using hand-calc.
I could even extend this debate to the point that it might be even be more efficient using automated sizing tools with some intuition in order to achieve the best design parameters, in a much faster time frame?
Finally I am intrigued by this gm/Id methodology which I must admit I have not researched or learned enough to comment about yet, but will be tackling soon due to the interest level of certain well informed members of this excellent forum. But I truly hope it provides a real advantage and is not one of today’s trendy alternative gimmicks.
Thank you in advance for your valuable time reading, thinking, or even replying.
Yours Sincerely,
F
I have over 15 years analog/rf IC design experience, and once upon a time (many years ago) I would always have a handy excel sheet with the following rough constants (Kn,Kp Vtp, Vtn, Van,Vap) for different types/variations of devices in a given technology (450nm+) which would be useful enough to get within 10-20% of BSIM3 simulation results using the approximated empirical hand-calculation equations we have all been taught.
In more recent technologies (sub-90nm & especially ones using BSIM4), I have tried to characterise these constants but the inter-dependencies have so many factors, that makes it impossible to have a set of useful numbers to play with (ie there are no constants). In this context (& my opinion), actually performing hand calculations is thus a complete waste of time.
One is better of using these empirical formulas (that have not evolved as rapidly), to gain a general appreciation (rough guide) to W/L sizing in order to achieve circuit performances, rather than true old fashion designing using hand-calc.
I could even extend this debate to the point that it might be even be more efficient using automated sizing tools with some intuition in order to achieve the best design parameters, in a much faster time frame?
Finally I am intrigued by this gm/Id methodology which I must admit I have not researched or learned enough to comment about yet, but will be tackling soon due to the interest level of certain well informed members of this excellent forum. But I truly hope it provides a real advantage and is not one of today’s trendy alternative gimmicks.
Thank you in advance for your valuable time reading, thinking, or even replying.
Yours Sincerely,
F