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altera_mf.v in altera suite what is required in xilinx ?

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hello all,
i have generated a RAM file in xilinx using core generator.
now to simulate the RAM file or to use it in my blocks what files are required to be compiled.
i mean to ask as altera_mf.v in altera suite what is required in xilinx.
 

Hi,

In Xilinx you have the Unisims and XilinxCoreLib libraries. You can find the sources of both libraries in:
<install_dir>/verilog/src
<install_dir>/vhdl/src

Devas
 

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