buenos
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detect one rising edge
hi
i want to detect a rising edge on an asynchronous signal, where the detection logic is synchronous.
i did this:
so, this should generate a pulse on the output for 1*T_clk.
sometimes it does not generate the pulse when the input signal has an edge. WHY?
if we generate the input event periodically and count the detection pulses, it seems it misses around 10-15% of them, and its varying.
If i make one more delayed version of the input, and use that (input_previous_previous) in the if-statement condition instead of input_previous, then it does not miss anything. its very strange.
the FPGA is an ACTEL proasic3.
could anyone explain what is going on?
hi
i want to detect a rising edge on an asynchronous signal, where the detection logic is synchronous.
i did this:
Code:
process (input, clk, reset_n)
begin
if (reset_n='0') then
detected <= '0';
input_previous <= '0';
elsif (clk'event and clk='1') then
input_previous <= input;
if (input='1' and input_previous='0' ) then --rising edge on the input
detected <= '1';
end if;
end if;
end process;
so, this should generate a pulse on the output for 1*T_clk.
sometimes it does not generate the pulse when the input signal has an edge. WHY?
if we generate the input event periodically and count the detection pulses, it seems it misses around 10-15% of them, and its varying.
If i make one more delayed version of the input, and use that (input_previous_previous) in the if-statement condition instead of input_previous, then it does not miss anything. its very strange.
the FPGA is an ACTEL proasic3.
could anyone explain what is going on?