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regarding simulation of PLL phase noise

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kbksharma

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site:www.edaboard.com pll veriloga

can any one help me to simulate the PLL phase noise in cadence

with the analysis of the transfer function i got the plots in matlab phase noise plots

is there is any posibility to simulate the total pll phase noise with out going to transistor level

please help me in this regard
 

kbksharma said:
... is there any possibility to simulate the total pll phase noise without going to transistor level?
Click to expand...
If you have the Cadence ahdlLib, you can use its pll veriloga module (with its submodules phase_detector, vco & lpf_1storder).

In the Cadence Verilog-A Language Reference (below) you can find a description of the PLL behavioral module, s. p. 426 ff.
 

Hi kbksharma,
Can you provide some info on the matlab simulations, like:
--> Is it that we have to look for the bandwidth, PM of the PLL using matlab?, or can we check the performance parameters like noise, psrr?
All,
If there is any data related to the matlab/octave simulations on PLL, please help.

Regards,
RDV
 

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