Estimation for placement and routing

Hi friends,

How you people do the estimation for routing and placement?

for placement::
Is their anything like no of component per day/hour??


for routing::
No of connections per day/hour??

Suggestions are most welcome..

Regards
Abhi

Its depend on the complication of circuitry.

NO component placement/30 mins but an hour is not same as routing.



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https://pcbfab1001.blogspot.com/

https://pcb1001.blogspot.com/

thanks for this suggestion..

what u told , is absolutely correct but how would u estimate the PCB effort.
we work for service based company,so always customer gives us schematic in PDF/oracd,no of layers,rough board size ,critical signals,creepage,clearence requirments..so based on above inputs how wouls u estimate?

We do two estamations,

- one based on the number of pins in the design
- one based on the number of connections in the design.


Based on designs from the past, we calculated the time on a pin basis and on a connection basis.
We use thes numbers from old designs, to calculate the time for new designs.


Then we average the calculated times and multiply it with a 'design complexity' factor, 0.7 for easy boards, 1.0 for average boards, 1,3 for complex boards.

The problem here is the 'complexity factor', which still is a designer view.


Altough it is no rocket science, the calculated time is a very good indication for the time we need to do the design.

Hi Senilicus,

Thanks a lot for your insight. That's the first method for estimating the layout time I've seen on the web.

What range of time-per-pin and time-per-connection values do you have? What layout tool do you use?

- Nick

Nick


I use Expedition PCB from Mentor Graphics for layout. When the schematic is worked on, I do an estamation by 'rule of thumb'. This is only based on my feelings about the design.
When the schematic is finished (90% or more) I do a forward annotation to Expedition an run a status report.

In the 'Design Status' report you find the number of connections (not the number of nets). This is the first number.
The second number I use is the number of pins in the design. I divide this by 20 to get the IC equivalent. This is the second number.

For all the designs we did with Expedition, we got these numbers out, and also from our database we took out the hours we needed to do the layout and generate the output package.
I divided the hours by number of connections and number of IC equivalents to get a time per connection and a time per IC equivalent. I did that for all of our Expedition designs and average these numbers. Now you have an average time per connection (TPC) and a average time per IC equivalent. (TPIC) These are the constants for our calculation.

(The numbers I calculated from the designs range from 0.0185 - 0.0549 for TPC and 0.37 - 1.13 for TPIC).


These constants are used to calculate the time needed for a new design.
layout time = TPC * number_of_connections
lauout time = TPIC * numer of IC equivalents


then I average these two numbers to have an average layout time.

These numbers do not take in account the number layers available, the complexity of the design and a lot more, but I found out that a correction factor is doing a pretty good job on this. I use the following numbers;

complexity = easy; K = 0,7
complexity = average; K = 1,0
complexity = complex; K = 1.3


This makes the final formula I use layout time = K * Average Time
.



In practice the calculated numbers are all within 5% of the actual time I need for a design. This is good enough for an estamation of the design effort. In most cases we the actual time is less than then the calculated time.

I have added an Expedition Design Status report as an example and highlighted the numbers I use for the calculation.

Hi senilius,
thank u very much for your valuable suggestion..

i have doubt on one of your statement below:

"The numbers I calculated from the designs range from 0.0185 - 0.0549 for TPC and 0.37 - 1.13 for TPIC"

the above calculation for TPC and TPIC is based on your design house experience?
because i used your method ,and our method of estimation and end up with double amount of effort with your method?
Please correct me

maybe I did not explain it well, but I calculated the TPC and TPIC for every design we did (in the past) with Expedition and labeled each design easy, average or complex.

The value's for TPC and TPIC were averaged. These averaged value's are used to do the calculation on new designs .

for example; TPC for three designs are 0.1, 0.3, 0.5. The average of these three is 0.1 + 0.3 +0.5 /3 = 0.3. This value is used for new calculations.
I do the same for TPIC.

For any new board we calculate the time by;
Number of Connections * TPC and Number of IC Equivalents * TPIC.

These two numbers are averaged and this average is multiplied with the complexity factor.



Note that we use the number of connections NOT the number of nets.