Forming loop while routing

Does forming a loop affect the design during routing?

Do you mean a signal route, a picture would help.
But in general yes, its not good design practice, they can act as a loop ariel, plus the signal will also have to paths to travel not a good idea, as anything within the loop (pads, pins etc) will be within the magnetic field of the signal, not good for EMC, SI.

Yes, forming a loop of same trace is definitely not a good PCB design.

Below are some thumb rules that can be followed when loop forming is inevitable

1. Avoid sharp bends (90° bends). This result in sudden change of trace width in the corner, hence impedance- resulting in
loss and affecting jitter budget. Instead turn the traced at a wider angle- at least 135° or more.
2. Maintain adequate air gap between the main trace segment and the loop segment. At least 4 times the trace width.
3. Bend segments should not be too short. That will create shorter segments of different widths there by causing a suddent
impedance mismatch. Hence try to maintain the bend lengths more than 1.5 times the trace width. This again is a thumb
rule
4. If you are adding Serpentine traces, length of each serpentine should be at least 3 times the trace width.

Again, please be aware that these are thumb rules that worked for me. And there could be better practices.

It is best to avoid loops where possible as they can cause a large amount of noise, which in turn can affect the signal integrity of many tracks on your board. Also they cause inductance which can also lead to increased noise.