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Difference in delays of NAND and NOR

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senmerida

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Why is there a more DELAY for NOR when compared to the NAND gate.
ie
Tphl(NAND)< Tphl(NOR)
 

Tphl(NAND)< Tphl(NOR)

this is incorrect. NOR should be faster than NAND in this case assuming tr sizes are the same.

if you wonder why NAND is faster than NOR in general, look at the transistor level circuit, and check the mobility of electron and hole.
 

NOR gate transistor level CMOS circuit has PMOS in series from Vdd to output. Mobility of holes is less than mobility of electrons. So, the output load, which is capacitive takes a longer time to charge. If , to compensate for the lower hole mobility, the width of the PMOS devices are increased, then, 1. The gate will consume more area. 2. The bigger PMOS will add more capacitance.
 
because nand gate density is more then nor gate density
 

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