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16-bit RISC Processor Designed with Domino Logic (ASIC Design Flow) using cadence

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venkatgandham

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Hi,

I am trying to design 16 bit risc processor with domino logic.
I don't have much idea about it, also trying to understand the domino logic.
couldn't understand 100% but getting there.

I want some help on this project, How to proceed ahead.
any paper's on the same topic helpful.
suggestions and design idea is welcome.
If not domino logic which is best design flow for it.
I am using cadence tool for it.
 

Designing entire processor with domino circuit is extremely challenging. You need to design the complicated control logic with a dual rail design. In fact, Domino circuit is a full custom design and not on ASIC flow in general.
Do it for datapath only, and design everything else with static circuit.
 
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