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verilogams question about multiple output pins

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xuedashun

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If a circuit generates 100 output current, is there an easy way to model the output currents by using ONE statement other than these below.

I(out[1], gnd) <+ 5u;
I(out[2], gnd) <+ 5u;
I(out[3], gnd) <+ 5u;
I(out[4], gnd) <+ 5u;
I(out[5], gnd) <+ 5u;
...
...
I(out[100], gnd) <+ 5u;
...

Thanks for your help!!
 

Look up the "generate" statement:
Code: 
generate i (99,0)
I(out[i])<+5u;
 
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