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input and output pins in cadence

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urian

urian

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Hi,there
I'm using IC5141 and want to build a bias module for my comp.The schematic is as below. The input i50u is connect to external 50uA ideal current source and comp_bias is output pin which connects a bias voltage for tail current source.


When I clicking save,the CIW shows a wrong message like this:

ERROR:Illegal bus reference - Can't tap "<comp_bias>" from net "i50u".


It seems that the pins comp_bias and i50u can not connect together.But I really want to export the comp_bias like this.How to achieve it without error mentioned by ic5141?
Thx in advance.
 

You are not allowed to connect two pins with different names on the same wire.
You could introduce a VDC with 0V or you could you use the "cds_thru" component in the "basic" library to separate the two nets.
 

    urian

    urian

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thx,JoannesPaulus
So,does the component "cds_thru" have any influence on the layout and tapeout?
 

It has the lvsIgnore property set to TRUE, so it should not affect the layout (and of course the TO).

At any rate, in general, it is not good design practice to give a net two different names. If your design allows, you could add a diode connected nmos (or a series power down switch) between i50u and the drain of TN0, to avoid the issue altogether!
 

    urian

    urian

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Great and thx so much,I add a diode connected nmos and there is no error message again.But, I wonder whether there is some spec. about the transistor? Furthemore,do you know where is the manual pdf file for basic library, I want to know the detail about cds_thru.
 

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