How to design a digital adder??

Hi. I'm preparing for an admission evaluation and i was given a guide for preparation. One of the problems is the following:

Design an adder in module based on the following truth table:

x y s
0 0 0
0 1 1
0 2 2
0 3 3
1 0 1
1 1 2
1 2 3
1 3 0
2 0 2
2 1 3
2 2 0
2 3 1
3 0 3
3 1 0
3 2 1
3 3 2

Both inputs and outputs should be codified in binary:

\[x=x_1 x_0\] , \[y=y_1 y_0\] , \[ s=s_1 s_0\]

Design the adder in its simpler form.


My questions are:

1. ¿How to codify the inputs and outputs? (i don't understand this :\[x=x_1 x_0\] , \[y=y_1 y_0\] , \[ s=s_1 s_0\])

2.- What's the basic procedure to design this kind of adders?

Please, help me to solve this. I don't have to present the solution, i only want to understand the procedure.

I'm using this book for my preparation:

Digital systems, principles and applications by Ronald J. Tocci.

Thanks a lot!!!

You are not being asked to design an adder.
You are being asked to design a circuit from a truth table.
The circuit, by instructor's choice, is an adder.

hi!

gjfelix2001 said:

My questions are:

1. ¿How to codify the inputs and outputs? (i don't understand this :\[x=x_1 x_0\] , \[y=y_1 y_0\] , \[ s=s_1 s_0\])

Click to expand...

As it says, it should be codified in binary, and so, if you take a look at each operand you will see that just 2 bits are enough to codify the numbers in binary, so:

0 = 00
1 = 01
2 = 10
3 = 11

As you will notice, x1 means the most significant bit, while x0 means de least significant one.

gjfelix2001 said:

2.- What's the basic procedure to design this kind of adders?

Click to expand...

I'm afraid you should be familiar with Veitch-Karnaugh diagrams to solve this kind of problems generally. So if not, take a look at this so you can get started on what these are: Karnaugh map - Wikipedia, the free encyclopedia

For this specific case, instead of developing karnaugh maps, you could simply start by designing a simple half adder, and developing it into a full 2 bit adder. For this you NEED to be familiar with boolean algebra...

Hi!! Thanks for your help!!! i've followed your advices, and i've got to a solution. It's handwrited in a couple of jpg files. Can you check it out??

Here are the images:





NOTES:

- I didn't included \[C_0\] INPUT in the \[TS_0\] truth table because there isn't an useful input for this case.

- I didn't included \[C_2\] OUTPUT in the \[TS_1\] truth table because i realized that we want a 2 bit output, so the third bit (\[C_2\]) is'nt needed.

- I think that both circuit diagrams are equivalent. In the bottom one, i realized that it could be reduced by using an EX-OR operation.

A QUESTION:

I've codified the original truth table manually and i rewrited it in binary. What if i don't want to do it manually?. I mean, what if i want my circuit to do it automatically??. What "component" should i use???

please tell me if i'm wrong.... any advice is welcome.

hi,

the solution looks good to me, and you can always check the circuit's functionality by simulating it (either manually or with a simulation software like multisim, for example)

gjfelix2001 said:

A QUESTION:

I've codified the original truth table manually and i rewrited it in binary. What if i don't want to do it manually?. I mean, what if i want my circuit to do it automatically??. What "component" should i use???

Click to expand...

I don't really understand the question... can you be more specific or post an example pls?

I mean: is there a circuit component that works like a decimal to binary conversor?? So for example i enter 2 + 3 (in decimal) and the circuit convert this numbers to binary, and then calculate the result and may be convert it again to decimal.

woah slow down here :-D

are you asking for some sort of keyboard? I guess that's far more complicated than what you want...

Otherwise, i can't see how would you like to enter decimal numbers in a circuit... electronics just understands 0 or 1... which means you will need to wire your bits...