opamp simulation question (Vos & PSRR & CMRR)

cmrr op amp

Hi~~~~
If i have a single ended opamp, i want to simulation it offset voltage.
I often see the simulation step is that Vin+ & Vin- tied to ground and measure output voltage, the output voltage/Gain is the Vos.
But when input of opamp is NMOS transistor and single voltage supply, it can’t tied to ground , the opamp will off.
So how to simulation input offset voltage?
Is using unit gain feedback configuration, then Vin+ tied to Vcm ,and Vos =Vcm-Vout ? but I think this Vos depend on Vcm & opamp’s Gain, the different Vcm the different Vos……is it correct ?

Another question is PSRR & CMRR simulation.
(no matter singled ended or fully differential opamp)
Why simulation PSRR & CMRR often use unit gain feedback configuration (CMRR=1/Acm)? Is for convenience or other?
And why i use open loop simulation CMRR=Adm/Acm, the result that is not the same as using unit gain configuration ?

Thanks a lot !!

op amp simulation

For knowing the offset voltage error, u acn connect the offamp is unity gain topology and apply a voltage sweep (of low freq or do DC sim over ur input range). Then substraction of input and output waveforms gives u the offset value for the whole input range. This offset will have 3 components:- linear (gain), constant (DC) and non linear, last one being the problematic.
Hope this helps.

offset op-amp simulation

The most direct, simple and precise way to simulate the opamp offset voltage is based on its definition:

Offset Voltage Vo is the voltage to be applied between both opamp terminals to bring the output to ZERO (assuming dual supply voltages).

Simulation steps:
1.) Connect a dc source VDC to the non-inv. terminal and ground the inv. terminal.
2.) Perform a dc sweep and display Vout.
3.) What you see is the opamp transfer characteristic (which for an offset free opamp should cross the point 0/0)
4.) The curve crosses the x-axis (VDC axis) at Vo.
5.) That means you have to apply a voltage Vo at the non-inv. terminal to bring the output to zero. That is per definition the offset voltage. Thats all.

Addendum: The dc sweep should be between -5mV and +5mV with a resolution of 1 mikroVolt

psrr operational amplifier

LvW said:

The most direct, simple and precise way to simulate the opamp offset voltage is based on its definition:

Offset Voltage Vo is the voltage to be applied between both opamp terminals to bring the output to ZERO (assuming dual supply voltages).

Simulation steps:
1.) Connect a dc source VDC to the non-inv. terminal and ground the inv. terminal.
2.) Perform a dc sweep and display Vout.
3.) What you see is the opamp transfer characteristic (which for an offset free opamp should cross the point 0/0)
4.) The curve crosses the x-axis (VDC axis) at Vo.
5.) That means you have to apply a voltage Vo at the non-inv. terminal to bring the output to zero. That is per definition the offset voltage. Thats all.

Addendum: The dc sweep should be between -5mV and +5mV with a resolution of 1 mikroVolt

Click to expand...

thanks you for your reply
But as i said , if the input and output is not rail to rail, how to modify this simulation steps ?

Added after 2 minutes:

supreet_95 said:

For knowing the offset voltage error, u acn connect the offamp is unity gain topology and apply a voltage sweep (of low freq or do DC sim over ur input range). Then substraction of input and output waveforms gives u the offset value for the whole input range. This offset will have 3 components:- linear (gain), constant (DC) and non linear, last one being the problematic.
Hope this helps.

Click to expand...

So is the Vos not a certain value ?
it depend on input voltage?
is it ?
thanks !

op amp simulator

Don´t worry about rail-to rail. This has nothing to do with offset !
Look at the definition of Vo !

contribution of supreet_95: Confusing ! Offset voltage is specified as cited by me. That´s all. Vo is one specific value given in each data sheet together with an uncertainty range (minimum, nomnal, maximum)

free op amp simulator

LvW said:

Don´t worry about rail-to rail. This has nothing to do with offset !
Look at the definition of Vo !

contribution of supreet_95: Confusing ! Offset voltage is specified as cited by me. That´s all. Vo is one specific value given in each data sheet together with an uncertainty range (minimum, nomnal, maximum)

Click to expand...

thanks for your reply
the attached file is my opa & simulation result.
i tied vin to gnd (vin DC=0) , and vip DC=0 sweep vip : -100mV to +100mV
What is my Vos ?
Is the two curve cross point? or other?
thanks a lot ~!

opamp offset simulations

Oh, I see. You are working in single supply mode.
However, offset voltage is defined only for dual supplies (and a nominal operating point at Vout=0 volts.)

In your case you have two options:

1.) Power the circuit with dual supply ± Vss (with Vss half of the value you are using, app +/- 1.5 volts ). Then you can apply the procedure as given by me.

2.) For single supply the nominal operating point is "somewhere" in the middle between both rails (0 resp. 3.5 volts); and I think it is rather unimportant if it is at 1.5 or 1.51 or 1.49 volts. Thus, in this case offset can´t be a parameter of interest.
Or do you have specific offset requirements ?

cmrr of an op-amp

i think it is difficult to predict the offset voltage of opamp. it is dependent to some factors, ex: process, match, ...

opamp offset simulation

thanks LvW
How do you thinks this methody?
It come from cadence white paper

op amp cmrr

Up to now I´ve got the impression that you are asking for a method to simulate the offset of a certain opamp model. Am I wrong ?

What do you intent to do with the circuit arrangement as shown in the figure ?
It is - as far as I see - a kind of definition for Vo.

Some more explanation to offset for single supply:

Offset voltage is an unwanted deviation from the nominal and wanted operating point
(for dual supply zero volts).
For single supply the operating point is fixed by a bias circuitry at the input terminal of the opamp and the influence of some inbalance inside the opamp (that is the cause for offset) is of minor influence if compared with tolerances of the bias circuitry.

Added after 55 minutes:

Hi chungming

I must confess, only now I´ve had a more detailed look at your circuit diagram.
And - for my opinion - it is not an "operational amplifier" but a classical differential amplifier with an output stage. But the name is not so important !
Therefore, my comments given up to now are not valid anymore.

The curve you have presented starts at app. 25 mV and has an operating point suitable for amplification at app. 32 mV.
Therefore, your amp must be biased by 32 mV before it can be used.
This voltage can be regarded as an offset voltage because it brings the amplifier to the desired operating point.
Question: What was your design goal ? DC input voltage of 0 volts or some Millivolts ?

Fazit: I would say your amp has an offset voltage of 32 mV !

simulating psrr in op-amp

LvW :
Thanks for your reply ~!! (i saw the message in designers-guide)

The testbench from cadence is not correct here.
Because this is used to measure fully differential amp and including some verilog a code, so forget it.

Yes my opamp is just only a classical differential amplifier with an output stage,
But i think the simulation step is the same, is it?

I think what you mentioned is correct, and i found another article in internet, it mention the measurement of a real amplifier.

The Vos = Vout/(1001) in graph A, and the graph B is only single supply configuration.
The Vin & Vip are tied to a fixed Vbias ,and Vout=(Vbias+1001*Vos.)
So i think the Vos simulation can use graph B, the Vos is just the cross point of Vout and Vbise . is it ?
And how do you think the PSRR& CMRR simulation?

I just want to figure out how to simulation all op specs.

psrr for single supply circuits

Hello chungming,

forget all circuit diagrams you have posted shortly !
At first, we should clarify some basics :

1.) Please realize the difference between (a) opamp and (b) diff. amp with output stage. An opamp is designed so that all three terminals (inputs + output) have the same dc potential ; therefore, resistive feedback is possible without loosing the operating point (which is 0 volts for dual supply).

2.) Your circuit diagram shows an amplifier which is no opamp because in the quasi-linear region there is an operating point at about 1.5 V (see the transfer curve provided by you). And the corresponding input voltage is about 32.5 mV.

3. ) You cannot apply feedback to your circuit without big influence on the operating point. You can compare your circuit with a single transistor stage which needs app. 0.7 volts between base and emitter. This voltage also is called "offset voltage".
Therefore, as I have mentioned earlier: Offset of your circuit is 32.5 mV.

3.) More than that, feedback is not necessary at all for determining the offset voltage. The circuitry you have sent with your last post are used for offset voltage measurements for real opamps only and cannot applied in your case (By the way, associated with this method is a large error; there are better ways to measure offset). For simulation purposes, however, the direct way is to create the transfer curve with a DC analysis as you have done already

4.) Am I right, that you are interested in simulation only ? No measurements of hardware ?

LvW

the ideal voltage transfer curve of opamp.

Vos , CMRR , PSRR does not have sense if you dont use "mismatched" components... for example Monte Carlo Models.

psrr simulation for operational amplifier

hi LvW ~
The result of curve_cr.png is Vin & Vip all tied to ground and sweep a small voltage at Vip.
I so curious why two inputs are zero voltage? the input transistors are all cut off....
This is the biggest point i can't understand .........!
The normal common mode input voltage is 1.5V , then the transistors in op all are in saturation region.
Why simulation Vos doesn't need the right operation point ?

I try to modify my op to operate at dual supply voltage.
The simulation steps as what you said , but the result are not the same ....
It so confuse me ............

The attached file : (TWO op are identical)
A : VDD=3.3V ,VSS=0V, Vin & Vip tied to ground , then sweep a small DC voltage at Vip . The simulation result Vos --> ~ 30mV (green line)

B : VDD=1.75V ,VSS=-1.75V, Vin & Vip tied to ground , then sweep a small DC voltage at Vip . The simulation result Vos --> ~ -6mV (red line)

Why the same OP has different Vos ?
Is in case B the Vip & Vin which need to tied to -1.75V ? (if tied to -1.75, then the offset is the same as single supply)....

Yes ! i interested in simulation only !

Thank you ~ !

simulating the offset voltage of an op amp

The result of curve_cr.png is Vin & Vip all tied to ground and sweep a small voltage at Vip.
I so curious why two inputs are zero voltage?

But you mention that you apply a small voltage Vip !! Input is NOT zero ! Why do you worry ?

I try to modify my op to operate at dual supply voltage.
The simulation steps as what you said , but the result are not the same.

Of course, the transfer curve cannot be the same for different power conditions. But the slope and the gain are the same. That is important !

The attached file : (TWO op are identical)
A : VDD=3.3V ,VSS=0V, Vin & Vip tied to ground , then sweep a small DC voltage at Vip . The simulation result Vos --> ~ 30mV (green line)


These are the same results as communicated before, right ?

B : VDD=1.75V ,VSS=-1.75V, Vin & Vip tied to ground , then sweep a small DC voltage at Vip . The simulation result Vos --> ~ -6mV (red line)

For my opinion, that´s a pretty good result. This transfer curve belongs to an amplifier with about 50 dB gain and an offset voltage of - 6mV.

Why the same OP has different Vos ?

Because in Case A it is a bias voltage and not an offset caused by imperfect component matching !!

Is in case B the Vip & Vin which need to tied to -1.75V ? (if tied to -1.75, then the offset is the same as single supply)....


Sorry, I don´t understand.

Summary: Your amplifier should be powered with a dual supply; If you compensate the offset effect by a small external voltage of -6mV you have about 50 dB gain (slope of the transfer curve).
LvW

how to figure out cmrr

HI I am doing an op amp with 741 architecture.
The circuit is enclosed. Could you help me to find out the CMRR , PSRR and the slew rate for this schematic. I tried doing it , but could not make it.
Thanks in advance.


If you find any anomaly in this circuit , kindly inform me.
Any suggestion on saturation of devices.

differential opamp cmrr

Why don´t you simply simulate the circuit ?
What should we do ? Copy your circuit and do simulations for you?

hey everyone:
I got a question. I did the same test method for input offset voltage. but I got only 600uV... i'm using AMI parameter in cadence. is that the problem that i didn't set the transistor well? i just size them...didn't do anything else...

Thanks!

Regards