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Since I found the chain configuration of Xilinx FPGA on user’s manual, I am wondering what we should take care when we are designing multi FPGA system.
NOt sure why do you need multi FPGA design details, basically two problems running out of pins, and running out resources. in both cases it is interface between devices, and protocol is challenge.
Fro configuration stand point of view I am always using small external MCU and external flash, never connect FPGA in chain, in case during debug I need to have change code in one FPGA on fly, or you want to hook Chip scope to the device, make sure JTAG is always available also I am using "generic" flashes so purchasing is not getting in trouble when I need flash
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