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anyone have boost dc-dc design in tsmc 0.18um process?

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sethtalk

sethtalk

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recently i finished a 0.9v~3.3v-->3.3v current mode boost dc-dc converter schematic design using tsmc0.18 process,i think use deep NWell may have better substarte noise isolation performance, but i doublt the necessity?
if some body have similar design experence, pls give some tip,
 

I think that deep NWELL gives u more large capacitance to PSUB and it have more large sheet resistance in comparing with NWELL. So u'll have poor substrate noise cancellation than in the case of using conventional NWELL.
Summary, don't use deep NWELL instead of usual NWELL if u can.
 

    sethtalk

    sethtalk

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hi, DenisMark
i found some related data about this topics inside the forum,you can ref to
 

In general it's needed to solve Laplace equation for NWELL and DNWELL.
Probably I'm mistaken. But if sheet ressitance of DNWELL is less that in NWELL case, I sure I'm right.
 

    sethtalk

    sethtalk

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