Why does CMOS not a good choice for PA design ?

What is the limitation & disadvantage ?
Thanks a lot.

If you compare 3 (4) terminal devices the product of current gainbandwidth and the breakdown voltage is important.

For MOS devices you get about 70-100GHz*V. SiGe Bipolar is about 2*3 times higher. GaAs a further factor of 1-1.5.

MOS have the additional disadvantage that the above speed is only true if the saturation voltage is very high. Tha mean that a significant amount of output power is loost in the device. That is because a MOS behave then more as a controlled resistor instead of a current source. If the breakdown is low you have to use very low load impedance to get the same power. This have to convert to the antenna impedance by costly, spacy and loosy transformation networks.

Nevertheless integration advantages dictate to integrate PA with the worst devices.

I have some to add:

1. CMOS PA is noisy, speaking of device noise such as flicker and thermal, especially flicker noise. This is much worst for PMOS, although NMOS is not any better. Although CMOS is very cost-effective to implement than Bipolar in fab, most CMOS is based on surface-channel device technology, this makes CMOS definitely susceptible to flicker noise, at low frequencies.
At high and very high frequencies, CMOS is not a problem.
Instead BJT always suffers from E-H noise at any frequency, the higher the worser.

2. In terms of bandwidth, CMOS cannot operate at much higher bandwidth as Bipolar and GaAs ones. BJT is also more stable, but MOS requires more circuit-level tricks to compensate.

3. It is easier to match load impedance using BJT than MOS. For MOS, you need to cleverly match it with L, Pi and other hybrid networks.

4. CMOS drifts very easily because it is geometrically-dependable. BJT is doping-dependent, therefore it has no issue here.

5. Despite all the disadvantages of CMOS, there is one thing CMOS beats all. It is compatible to digital CMOS. You can implement mixed-signal RF-Analog-Digital in one single die, all using the same CMOS technology, usually 0.18 and higher. It is difficult to implement in 0.13 and below because linearity mismatch error is very high in ultra-deep submicron.
CMOS is always having linearity issues. This is not a problem in Bipolar.