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Thevenin Model for source voltage components and output resistance

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anhnha

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This is MOS small signal model from Binkley book:
I am wondering why the author chose Thevenin model to represent source voltage components and source output resistance?
Why not use Norton model here for source?

MOS small signal model Binkley.png
 

i think its because A FET is voltage controlled device because its output characteristics are determined by the Field which depends on Voltage applied.

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FET is voltage controlled current source
 

Hi,
I don't think that I understand your answer. FET is a voltage controlled current source. It converts input voltage (Vgs) into output current (Id).
What I don't get is why Thevenin Model is used to represent the circuit here.
 

The author is using thevenin's model probably for the fact that when you look up from the source, the impedance is very low and the whole circuit looks as a VCVS. So, it is easier for calculations to model a VCVS with thevenin's model.
 
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    anhnha

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Thanks AMS012. That makes sense. Is there any more idea?
 

thevenin equivalent is a voltage source and norton equivalent is a current source. since FET is voltage controlled current source, thevenin equivalent is for input (gate) and norton equivalent is output (drain).
 
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Hi,
For FET input is Vgs and output is Id. So why at source itvis represented by a thevenin model not Norton?
 

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