Proper Design Procedure in Selecting Components for LM317 Voltage Regulator Circuit.

Hello.

Here is a circuit from LM317's datasheet to increase the output current, however I don't know on what basis the resistors values is choose.
Here is the circuit:


The idea comes from a LM317 datasheet that does not offer a single word about what the resistors do but I have marked the resistors of interest with a red dot and it is only the 3resistor/PNP/NPN part of the circuit that this concerns.

I would think that the resistors would work something as:
1, one resistor to limit the current through the regulator.
2, one resistor to control turn on/off of the PNP through its voltage drop exceeding Vbe.
3, one resistor to manage the turn on/off of the NPN transistor.

But I found a LM317 model for LTspice and simulated the circuit with strange results, I did set the LM317 with a 30V input and resistors to result in a 25V output, but the output never was 25V.
Adjusting the three resistor values(those with the red dot) adjusted the output voltage and I got a output of 10V to 22V depending on value of the 3 R's.

That did not help and I think the LM317 model might be flawed or something not obvious I had done.

This is a annoying step in a design process and I have spent enough hours on this to think to ask for help, the voltage regulator should never output more than 50mA and the hole circuit will deliver up to 5A.

Regards

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In the LTspice simulation output voltage varied with load resistor value also.

Okey, so I had a transistor the wrong way around but I was not expecting the voltage at the regulator input to swing so much with a changing load current.

And I can't figure out a good way of ensuring that the regulator never exceeds 50mA output current, any ideas?

Regards

David_ said:

Hello.

Here is a circuit from LM317's datasheet to increase the output current, however I don't know on what basis the resistors values is choose.

Click to expand...

R3 is to ensure that Q4 the larger power transistor can turn off completely, and not amplify any slight leakage current through Q6. Its not a critical value, 470 ohms is common value for this function and anything below a few K should work fine in that position.

The 5K base resistor R2 is to limit the base current to something safe under fault conditions. It too is not a critical value, but there must be some resistance in the base circuit, but the actual value should have little or no effect during normal operation.

R1 the 22 ohm resistor is the critical one.
It sets the point at which the power booster starts to bypass current around the main regulator. In this case when the main regulator reaches about 27mA the voltage drop across R1 will reach 594mV, and beyond that the power booster should start to conduct.

The LM317 has no current limit function, except when it goes into total thermal shutdown which is not the same thing.
If you want to have a useful predictable current limit, a different voltage regulator type will be required, or at the minimum an extra IC will need to be added to the existing circuit to perform that function.

You can get lower V dropout with a P Ch MOSFET with low RdsOn ( SMT preferred )
You might be able to get >90% efficiency if you use two P ch MOSFETs and OP Amp, one to preregulate Input in class D mode and one in linear mode with low drop voltage just using any LDO or 2.5V ref diode. and make it adjustable V and adjustable I with 50mV current sense R.

One problem is that I have no SPICE model for the regulator which is used, its a TPS7A4001 though I just found out that there are a model made for TI's TINA simulator which is run with SPICE to.

In the mean time I used LT3013 with LTspice since this is much more alike to TPS7A4001 than LM317 and there seems to some fault in my LM317 model because the circuit behaves very differently with LT3013 and with LT3013 I can at least find some kind of steady state condition.
I might not use that term correctly but with LM317 the result was just confusing.

Though I have one problem, here is a circuit to perform the same task with only a PNP transistor that illustrate the problem:


Here I have used 15k for R1 but that is wrong though it makes the problem more obvious, the way that current through a PNP goes feeds the regulator so it outputs way more than 50mA. Ideally I would like to limit the regulators output to perhaps 40mA.

But I have been thinking about if there are any need to allow the regulator to output any current at all above the minimum load needed to keep the regulation of the voltage from not failing.
I might size R1 to give a ≈0,7V drop at only 10mA.

I need to study transistor parameters more thoroughly, what is the name of the parameter that tells me at what voltage it starts to turn on, is it V_BE for Voltage Base-Emitter?

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The Problem presented above is still there in the version which has both a PNP and NPN.
By the way SunnySkyguy, do you mean that I can change the power NPN transistor for a P-Channel MOSFET?

How about using an LM723 chip ?
https://www.ti.com/lit/ds/symlink/lm723.pdf

This is a very old chip, but it will do everything you want, including providing a current limit, when hooked up to to a suitable external power transistor.

The Ic try's to set its FB terminal to 1.19V. So without the DAC and RFB3, the output volts = 1.19 X RFB2/RFB2 + RFB1.
Frank

Can you define what it is you need, RATHER than try to implement something that may or may not be right.

Inputs
Vmin, Vmax, Imax
Outputs
Vmin, Vmax, Imax
Load, linear, reactive or nonlinear?

Hi,

The feedback function of LM317 is totally different to those regulators with FB input.
While many adjustable regulators work with a constant feedback voltage referenced to GND, the LM317 works with a constant voltage referenced to it's output (not to GND).

Klaus

Yes now I remember that LM317 will not work for this circuit, but now I have found a suitable LT part and have proven the circuit with a PNP controlling a NPN will work, or not quite.
Here is three pictures, the first is the circuit, the second is the simulation of that circuit BUT with an unspecified NPN transistor and the third is a simulation of that circuit with a specified NPN transistor model:
1:2:
3:

While forgetting to pick a transistor model for the NPN the circuit worked and the regulator output never exceeded 44mA which is why you can hardly see that trace, when picking the only model that can sustain 60V and manage 5A(the second plot may use other colors for the traces but use the first plot as a guide) then the regulator outputs almost 220mA and I don't understand what characteristic of a transistor tells me how much current my regulator will have to output to get the PNP to turn on the NPN enough. Its hard to ask the question since it can't just be about one thing but maybe its understandable what I am asking about.
I will also try to work out how I would put 2 NPNs in parallel to more easily handle the power dissipation although one package might do the job, I will use a heatsink and a little fan that will be off if the temperature allows it.

I can't remember why the LM723 did not interest me but I will take another look at it, it might have been the output noise and other specs.

I did not fully explain the circuit implementation because I had trouble specifying the working conditions, it will vary since this would be part of a post-regulation stage which follows a adjustable offline switching regulator. And I have not jet fully worked out how this will look but this circuit in this thread will be subjected to somewhere around 10V-60V in order to output 0V-50V and under 50V it should be able to sustain 5A.
This is a project that has been going on for some time and I have not found a way jet to deal with the SMPS characteristic which results in a constant output power(lets say it is anyway), so while at 50V 5A would be max, at 25V it would be something like 10A.

I think it will have to be two different circuits, one low power and one high power but I don't want to actually build two hole almost identical circuits for the post-regulation but rather build one that is adaptable through analog switch ICs or relays or something as such.
But that is only my hopes, who knows maybe it will turn out that two different circuits is needed.
The most important aspect of it all is the end result as this will be my lab power supply in the end with two floating channels, the funny thing is that in the end it would have been cheaper to buy a consumer product rather than manufacturing one single unit of my own, maybe that isn't very funny but in fact expected.

There are a troubling amount of "don't know" and "not sure" answers to questions one could ask and need to ask to get a full picture, I spend time on the offline switcher but I came to feel the need to switch my subject of focus for a while but I should soon get back to the switcher so as to find out how it will behave so I can then tailor the post-regulator to that.

Thank for all of all your answers so far.

Oh wait, why I have chosen TPS7A4001 is that:
1, it has a wide enough input/output range.
2, it has good noise and PSRR specs,
and when I looked around I found that in order to get the lowest noise regulators you can't get much current from it at all and the specs for TPS7A4001 is a big improvement from LM317 and other older or higher current regulators.
I don't know jet if I can maintain these specifications through he use of a current boost circuit but we shall see about that.
As I see it and as far as I know the regulator in use will have a big impact on the systems performance, but how much a regulators specifications will alter from the use of external transistors I can't know and also a regulator can't possibly smooth out all the noise and ripple from the forward converter in this case. But I have researched how one would manage the high ripple noise with linear regulator and according to some prominent person within Linear Technology(which is pretty much the only source of information on this subject) the "special sauce" is to use ferrite beads in front of and following after the linear regulator, and a capacitor for each bead.

Regards

Yesterday I found out how and what the spice directive .step param R1 10 100 10 does(for example) and it really made a big difference in my ability to understand the effect of component values. The above statement alters the value named R1 between 10Ω and 100Ω in 10Ω steps. I'm sure that it is a really basic thing to use but I never used it before and through that method I determined the values of the circuit to be:
R1 = 70Ω
R2 = 1kΩ and
R3 = 470Ω

Somehow the 1k PNP base resistor made a difference although not so much as to be deemed as important but if you tailor a circuit like this to never allow the regulator to output more than 50mA then it can make a difference.

I tried paralleling two NPN power transistors by simply tying base to base, collector to collector and emitter to emitter and it work nice in LTspice but it does not feel right or maybe I mean bullet prof so I tried to ad a resistor in each base connection and it did work but the current waveform was distorted and it lost its edges when the load suddenly changed.
I don't know if this is something that can impact on performance but is it okey to parallel two NPNs without any other components in this application?

Regards

It is fairly common to run multiple output transistors in parallel a circuit like this if very high output current is required (many amps).
Each individual power transistor having its own low value resistor in the emitter to provide much better current sharing between the individual transistors.
For only 50mA required maximum output it seems hardly worthwhile.

Okey, I think I've made my self misunderstood.
The voltage regulator I am going to use can take damage if its output current exceeds 50mA, so that is why I am trying to design a circuit that will use external transistors to deliver 5 and maybe 10A.
I will insert emitter resistors.
Thanks

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While ensuring that the regulator at no point will ever exceed 50mA, though I have gone for a ~35mA maximum.
I've been feeling frustrated through my failures using LTspice to excel my understanding but finally have open the door to allow me to find answers I previously been forced to ask, I actually like getting help with aspects of design, its pleasing some how but I feel that the time is due for me to able to stand more on my own legs though I am searching for university classes in my home town since I lack math, I am useless with rearranging algebra equations, I need to earn integration and how the sigma sign is used when you actually do the calculations, and I need to get a grip of complex numbers and brush up on Pythagoras theorem, and some other math frequently encountered in electronics, being unable to do iterations of algebra to get a variable from the right side of the = to be the only one on the left of the = appears crucial.
If that is not a given skill than I can read for hours without getting anywhere.

Hi. This Signetics "Golden oldie" in the voltage regulator section/chapter, page 59 onwards, could be worth the few pages it is of reading to look at pass transistor configurations and their pro's and con's, hope it's of use to you with what you're doing. Maybe you've seen that already: the ST 78xx datasheet has figures 13 and 14, which when you decipher the formulas are pretty simple to calculate the bypass resistor and the overcurrent resistor.

View attachment 1979_Signetics_Analog_Applications.pdf

Wouldn't it be better to choose a MOSFET bypassed LDO that is already in production?
There are lots to choose from. Or roll your own with a logic level MOSFET and use the LDO drain to bias the FET. It would be at least 10% more efficient and better if using SMT to a heatsink or PCB..

d123, that was a very interesting document. Although it did provide me with ideas for doing basically what the shown circuit in this post does but with added short circuit protection or fold-back current limit(not sure exactly what that means jet but I'll find out), I will spend a lot of time reading most of it since I have never seen a document describing the pure transistor circuits that is inside of regulators. Thank you very much.

SunnySkyguy, I suppose that it was you who previously mentioned using a P-Channel MOSFET and I am interested in such a solution but my attempts in LTspice so far have been puzzling to say the least, I just went back to try it again and I discovered that I had put in the MOSFET the wrong way around which caused the output voltage to begin at ≈ 40V only to drop down to ≈ -360V... weird.
Anyway changing drain and source connections it kind of worked, it works but quite differently from the NPN.
Here are two plots, the first is from the NPN circuit and the second is when the NPN is changed to a P-Channel MOSFET:
1,
2,

As you can see there are big differences in the output voltage as well as the transient response of the output voltage which I thought would be fully controlled by the regulator and not the external parallel transistor.
Does someone have a explanation for why the output voltage is so different both in amplitude and the response to current demand?

Regards

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Using two NPNs with 0.5Ohm resistors in each emitter gives the same result as the above picture that uses a single NPN and no emitter resistor except that in the two NPN case the output voltage is somewhere around 1V lower and the peaking shapes is reduced by perhaps 30-40%, which I find interesting.

Hi David, hope it's going well; don't want to waste your time, but if you're interested this pdf has similar information about linear, LDO and SMPS regulators.

View attachment CHAPTER 9 POWER MANAGEMENT LINEAR LDo SMPS VOLTAGE REGULATORS EDCh 9 power Analog Devices.pdf

David_ said:

SunnySkyguy, I suppose that it was you who previously mentioned using a P-Channel MOSFET and I am interested in such a solution but my attempts in LTspice so far have been puzzling to say the least, I just went back to try it again and I discovered that I had put in the MOSFET the wrong way around which caused the output voltage to begin at ≈ 40V only to drop down to ≈ -360V... weird.
Anyway changing drain and source connections it kind of worked, it works but quite differently from the NPN.
Here are two plots, the first is from the NPN circuit and the second is when the NPN is changed to a P-Channel MOSFET:
1,View attachment 121759
2,View attachment 121760

Click to expand...

1st photo 2.2Vdrop/5Arise thus ESR= 0.44 Ohms
2nd photo 0.28Vdrop/5Arise thus ESR = 0.056 Ohms or 56 mOhms

Load regulation is the inverse of ESR / Rated load R x100%

1st photo
2.2V drop out of ~21.4Vmax= ~10% load regulation error. with a load of 5A on 21V thus Rload~4.2Ohms equiv.
thus ESR/Rload (rated) = 0.44/4.2 = 10.5% Load regulation error

2nd photo
with ESR= 0.056 /~30V*5A(=6 Ohm rated load) = 0.93 % load regulation error just under 1%.

bravo.

Pch Fet doesn't need much bias current but too high a resistance causes RC lag from dynamic Icss input capacitance which is maximum during switching transition.

RdsOn controls steady state voltage drop ( Or load regulation error) by increasing Vgs which lowers RdsOn using a bigger FET or parallel FETs.

Hello.

I'm afraid the plots where misleading and the circuit does not work at all as it is now.
The plots from the circuit that uses the P-Channel MOSFET show a small voltage drop from the input voltage but the problem is that the voltage stays at the same value no matter what the regulator voltage divider dictates the regulator to output, I can change the voltage divider values over a wide range without any effect on the output voltage just as if the MOSFET is clamping the output to a voltage near the input voltage range.

Do anyone have any idea why this might occur?

Regards

Hi,

please show your actual schematic.
Best if you can measure some voltages and draw into schematic.


Klaus