predator89
Member level 1
I have to design a high voltage amplifier using high voltage mosfets on cadance. Its application is to amplify the output of Digital to analog converter. Amplifier should have this ratings
Input range is 0 to 3 V
Output range is 0 to 50 V
So for this design I started low voltage input stage consisting two stage opamp.
And now i am planning to design a output stage with push pull amplifier consisting HVMOS.
But I am confused will that work? and if yes how can i interface high voltage output stage with the low voltage opamp?
Input range is 0 to 3 V
Output range is 0 to 50 V
So for this design I started low voltage input stage consisting two stage opamp.
And now i am planning to design a output stage with push pull amplifier consisting HVMOS.
But I am confused will that work? and if yes how can i interface high voltage output stage with the low voltage opamp?
