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Re: NEED HELP ,how to calaculate the gate resistance of Igbt (fg25n120) /Mosfet
You still have some sharing current paths (gate current + source current).
You better try something like this:
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Or you could use 2-pin headers for every gate circuit and run (between them) with separate high current traces from every MOSFET source to the 3-pin motor header located bellow.
The DC link voltage level is dangerous for your driver (any small spike could destroy it).
You better find another solution to drive the high-side MOSFETs. As you're already using optocouplers between the MCU and drivers, you may choose any regular low-side driver and the bootstrap technique for that.
Another (more expensive) solution is to use separate (isolated) power supplies (15V) for the high-side drivers and use regular low-side drivers, too.
Yes, that's a good practice. The capacitor across Vcc and Com should be at least ten times the capacitor across Vb and Vs as it needs to supply the current for the driver IC, for driving the low-side MOSFET and for charging the bootstrap capacitor (Vb to Vs), too.
Low esd ceramic capacitors represents a low impedance path to ground for any parasitic spikes thus limiting their amplitude (and distructive effect).
Low ESR capacitors are mandatory, regardless the electrolytics size. Only ceramic (or film) capacitors withstand the high current pulses for driving the MOSFET gates. Electrolytic capacitors are just some energy buffers who deliver power to ceramic ones during gate pulse inactivity (take it as a simple terms explanation).
in my project 3 driver is used.
shall i take the power supply to 3 driver ic by single 7815 output.??
or design 3 seperate 7815 ic to power 3 driver ic ??
What about the LM7815? Actually, the gate peak current it's fed by the ceramics capacitors thus LM7815 don't have to withstand 6 x gate peak current but a mean value.
Altough it might be enough, it's better to use LM338 or equivalent.
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