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outstanding transaction : when master initiates a transaction without waiting it to complete, it can issue next transaction.
ooo txn: the order transactions are sent and the order the responses were received is not same.
prioritizing the transaction and compelling them not in the order in which they have arrive is out of order ccompletion. in axi4 only read transaction can be completed out of order while in axi3 read and write instruction can be completed out of order.
and sending the subsequent transaction address on same channel while one transaction is proceeding is known as outstanding transaction
I have a doubt, in AXI3 also, if all the masters have same ID (or single ID, or without ID), can't perform out of order transaction.
I think Multiple ID should be must for performing out of order transaction, both in AXI3 and AXI4.
Correct me if I am wrong.
I cant share axi4 spec due to arm's norm. and I said "write traction completed in a order; not out of order" I mean for a master it should receive its transaction as in the order it has sent.
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hi
this will depend upon interface; becuz interface adds extra bits in to id and in that way they can complete out of order
Is it that then ooo transaction have ti include outstanding transaction to execute ooo transactions? This is because in ooo transaction also address for read and write need to be issued one after another although the corresponding transactions have not completed?
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