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why do we make flip-flops in to scanable flip-flops????

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tyuga454

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Hi,
we are doing scan-insertion to increase the testability.
In the scan-insertion we do flipflops into scanble flipflops.
why we are doing this and how the testability increases by doing this???
please explain me?
 

We are doing this to increase the controllability and obserability ....by converting to scan enable flops, we can control the input of ff and also we can observe the output of ff...without worrying about the functionality of the chip....
 
thanks for your reply.....
you mean to say that after making ffs in to scanble ffs you can detect the faults in the ff(controbility and observbility) thus,the testibility increases(detected all faults in the ff)...
plz correct me if my understanding is wrong????...thnks alot....
 

The idea of the scan is to create a chain(s) with all flops to be able to load easily some new values.
Then the scan flop as just a mux on the D pin of the flop to select the functional path or the chain path.
I means a basic flop with a mux could do the same job, but more area and worst timing.
 
Scannable flops are need for design for test. This is a fundamental requirement of the digital design these days. This will check the functionality of the flop as well as the logic associated around it. Any book on DFT will cover this in detail.

There are some exceptions to use of scanable flop. Due to the timing/power/area overhead certain portions which critical dont use scannable flops. these are tested through loop back or some other mechanism especially in digital portion of mixed signal design.
 
tyuga454 said:
thanks for your reply.....
you mean to say that after making ffs in to scanble ffs you can detect the faults in the ff(controbility and observbility) thus,the testibility increases(detected all faults in the ff)...
plz correct me if my understanding is wrong????...thnks alot....
Click to expand...

We are not only detecting the faults in the ffs...our main target is to test the full design. DFT is basically for detecting the manufacturing defects. These defects can also be in the combo logic...but the problem is how to control combo logic...that can be done by scan enable ffs.....suppose, there is combo logic between two ffs...so first flop is for controlling the combo logic and second ff is used to observe the output of combo logic.....
This can be done by making scan chain in the design...as already told by rca....
 
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