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Hi fragment,
I am sorry I didn't describe in detail.
The situation is, when I was doing short circuit TESTs, the IC is biased at trickle condition.
1) VIN=+5V, VBAT=0V(in trickle charge condition), TEMP=1.5V(normal condtion).
2) I used a metal wire to short VBAT and TEMP, there is a large...
Thank you ESDsolution,
The situation is, when I was doing short circuit TESTs, the IC is biased at trickle condition.
1) VIN=+5V, VBAT=0V(in trickle charge condition), TEMP=1.5V(normal condtion).
2) I used a metal wire to short VBAT and TEMP, there is a large current(2A, current limited by 1.5V...
Hi all,
My chip is burned down, it was burned after a long operation during tests. It's a 1A charger IC. I have tested several tens chips, but 2 were damaged. I saw Supply current is current limited by my setting(2A), VBAT current is ~30mA, and then chip was burned down.
1) Could you help me...
Hi all,
My chip is burned down, it was burned after a long operation during tests. It's a 1A charger IC. I have tested several tens chips, but 2 were damaged. I saw Supply current is current limited by my setting(2A), VBAT current is ~30mA, and then chip was burned down.
1) Could you help me to...
Thank you all. If I only want a li-ion battery model for charger circuit to simulate in trickle/CC/CV mode to check if the charger circuit is OK or not. What is the most simple and appropriate model?
Thanks again.
Dear butterfish,
Thanks for you help.
You give me a hint to do this. Actually the accuracy is low, so I can use the method you mentioned to just use VTH and VDD-VTH to monitor if this internal voltage is running out of 1.8~2.0. Am I correct?
Thanks a lot!!
Hi,
Could some one help me to realize a simple circuit to detect a node voltage which running out of some range?
In my circuit, there is an output node of an OP, when in normal operation, it's about 1.8V~2.0 at all corners, but if the OP's feedback node is shorted to some voltage, this node will...
Hi,
Can anyone help to tell what's the criteria of short channel effect?
I mean, for example, in .35um process, what size that MOS length smaller
than will result in short channel effect? And what AC/DC effects will be induced
in short channel condition?
Thanks a lot!
Thank you all for your inputs.
Sankudey, I was confused because you mentioned about generating CZ from C but not reverse?? Could you please to explain more in more detail about part 2?
Also, I heard that the clock feedthrough effect can be simulated, but the channel charge injection can't be...
Thank you in advance. I am designing a switch cap for sample and hold. I use transmission gates as switch and a cap to hold charge. The control signals to control PMOS and NMOS are C and CZ, then:
a) To avoid clock feedthrough, should the Tr/Tf of C/CZ be sharp or not? And is there any optimized...
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