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Thanks Dave,
It's really helpful. But $countones seems only works in Questa. VCS does not support using $contones in contstraint blocks in 2012.09 version.
In my systemverilog testbench, I need to genrate a 32 bits sequence which randomly contains 5 to 27 bit "1". Can anyone help me to describe the constrant of this random bit-sequence? thanks a lot
Sometimes I used forever or repeat in fork...jone_none thread but forgot to disable it. It's still running and led into some unexpected situation in the following testcases. Is there any method that can let me find out which inappropriate threads are running in the systemverilog testbench...
Yes we found the reason of this problem. you can change PT's multi-core attribute like this
set_host_options -max_cores 1
then write sdf.
hope it helps.
hi, yx.yang.
I rewrote both 2.1 and 1.0 SDF files from an old version PT and ran with the latest version of ncverilog before. But it doesn't work.
thank you anyway.
hi,
I back annotated netlist with the sdf file which is generated by Primetime from spef file. But when I was running the post-simulation with ncverilog, I got the messages,
ncelab: *W,SDFRDE: Read error for default code, skipping annotation of tst13.sdf.X.
ncelab: *W,SDFRDE: Read error for...
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