Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by tsuresh

  1. T

    [moved] Do I need to model a big time in .lib ?

    Hi, Its related to .lib modelling of memory block. I have two power down pins. These are asynchronous pins in nature. ________ A__/ \______________ _______________ B__/ \_______ There is a recovery window of 10us from falling edge of A to falling...
  2. T

    Dynamically change of specparam in verilog ?

    Hi, My requirement : access time has to change depends on the frequency Current implementation in short : ========================== specparam : taccess : 3:4:5 always @(posedge CL) Q<=D; ========================== So whenever there is a Clock, I get the valid data in "Q" after "taccess"...
  3. T

    How to use command line option(compiler directive) inside verilog model

    Hi, How can I use the command line option as a switch inside verilog model ? Ex: My command line is (say) ncelab -delay_mode unit (or) ncelab -delay_mode zero How can I use "unit" or "zero" inside verilog model ? Requirement is: I want to change some timings depends on this switch. Regards, suresh
  4. T

    Can someone explain about flash memory trim bits ?

    Hi , We have few trimming inputs in flash memory.I want to know more about what is trimming and why and how it is used ? Will it be used post silicon or during design stage ? Trim info from spec says : "The high voltage applied to the matrix cells is fine controlled by the 42bit trim input...
  5. T

    What is the use of `suppress_fault and `enable_portfaults in verilog ?

    Hi, Thanks. I could find them in the user guide. Regards, Suresh
  6. T

    What is the use of `suppress_fault and `enable_portfaults in verilog ?

    Hi, I tried google it but couldnt find the answer. Could someone pls explain me what is the use of compiler directives `suppress_faults and `enable_portfaults in simple way ? Thanks Suresh
See more

Part and Inventory Search

Back
Top