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Recent content by tlp71@hotmail.com

  1. T

    Thank you / New look and feel OF EDA board

    Re: sorry dont like it i like why not? it appears less faster than the old Edaboard site but the feel and look is nice.
  2. T

    Problems with ISE 11 on Windows 7

    Re: ise11 on seven yes ise 11 running but i can't update. i downloaded all the package but setup.exe doesen't run
  3. T

    9600bps - from 80MHz input clock using Virtex 5

    you can use the pll or dcm. bye. g.
  4. T

    Problems with ISE 11 on Windows 7

    ise11 on seven hi, i installed ise 11.1 in seven and all seems work fine. i tried to update to 11.4 s.p but the setup doesen't start. hany have the same trouble? my 7 is 64 bit. tks for help. bye. G.
  5. T

    generate higher frequencies at the output using fpga

    some devices ,lattice, actel surely have a dedicated analog pll inside the device. you can use this .
  6. T

    interfacing E1/T1 with FPGA board??

    fpga 2 rj-45 do you rember that e1 use a aalog modulation? You need also a liu or a liu/framerinterface if you would like to use whit a e1 g703 standard link.
  7. T

    Question about lookup table in VHDL

    look up table in vhdl yes, you have. you can use a ram module.
  8. T

    how many capacitor decoupling VCCint,VCCaux,VCCo for virtex5

    Re: decoupling virtex5 xilinx says that v5 don't need capacitors intead then one in the main vcc for core and io. all others decupling capacitors are in the die.
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    Help in FPGA Design(Xilinx LUT-4 Problem)

    lut-4 may be that when you sintetyze your blocks alone, xst cut a lot of logic unconnect. when you try whit the entire project you can't remove anithing. the best way to check what happens is to open a case whit xilinx. you can send him your project and they can reply. or if you like you can...
  10. T

    [Q] Xilinx DCM unlock automatic reset

    xilinx dcm unlocks depending from chip revision, in some architectures, Xilinx DCM will be alwyas on. I remeber that you have to set the "STEPPING"according to the word in UCF file.
  11. T

    using commercial FPGA on industrial temp range

    usually FPGA that have an extended temperature range works slower than commercial. i think that is not a speed problem. Also if a single device works at low temperature may be that not all future devices works fine. G.
  12. T

    JTAG connection ereror in FPGA

    wich kind of error?
  13. T

    please check this code

    whic frequency have your clk?
  14. T

    custom peripheral in microblaze

    you have to insert in the ucf of the project the pins that are ingoing or outgoing in the fpga.
  15. T

    Connecting FPGA & DSP

    simply trace right lines. What do you interest?
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