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Hello clive.seguna,
I am having the same problem. How did you end up fixing the error? I didn't get the reply from erikl.
I am sending a picture of my layout. It is basically 4 mim capacitors interconect 2 by 2. I added the tie down diode TDNDSX (from 180 nm IBM) and connected it to the mims...
Hello guys,
I am designing a differential mixer and I am facing some problems with measuring its conversion gain and IIP3. Trying to solve this problem I am using a block in verilogA of an ideal mixer, but the IIP3 and ConvGain set in the block are not the one I am measuring. Hereby is the...
Re: Virtuoso 5.10 & Calibre LVS Error
Thank you! The "OUT" pin seems to be connected, but now the LVS is showing me the warning:
ERROR: Supply error detected. ABORT ON SUPPLY ERROR is specified - aborting.
Is it something related to the gnd and vdd?
thank you and forgive my...
I tried that already, but I get a warning which stops the LVS.
WARNING: Open circuit - Same name on different nets:
Name: "OUT+"
(1) at location (1125.179,779.203) on layer 136 "METAL6_pintext" on net id 8
(2) at location (1125.179,779.203) on layer...
Hello,
In my layout I assign the port material to be "metal 6 pn", but the LVS reports me that the ports are missing. I am working on ST foundry and my verification tool is calibre.
I have tried Metal 6 PN for the port and tt for the Text, Metal 6 PN for port and Metal 6 PT for text, and...
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