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Hi All,
I would like to know what are the things to be kept in mind while developing s testbench for verification of a Protocol using
Specman-e such as the use of temporals etc etc....................
Hi you can do functional coverage by writing a code which will incorporate it.Basically coverage would require you to define items of the input and output of the design to check wether the defined combination of input stimuli has been applied to the DUT and the output corresponding to certain...
Instead of using HDL for verification go for HVL(hardware verification languages such as specman e/system verilog and specifically for memory verification you need to incorporate a checker in your testbench that will verify automatically wether the sent packet was reaed accurately from that...
Hi all,
Going through the I2C spec. I came across the fact that :-
"The inputs of Fast-mode devices incorporate spike
suppression and a Schmitt trigger at the SDA and SCL
input."
What is the role of schmitt trigger here??
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