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Recent content by slienteyes

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    How to design asymmetrical Doherty power amplifier?

    doherty power amplifier How to design asymmetrical Doherty power amplifier? Using uneven power splitter could be one way. question is how to define which path have more power, main amplifier path or peak amplifier path? Other way is to use different LDMOS transistor, do you have some suggestion...
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    How to define the input power for LDMOS transistor?

    loadpull problem you mean I need to tune the input power so as to get the 1dB compression point? Optimum load impedance should be the compromise between power and efficiency. Normally, we don't choose impedance at 1dB compression point. Right?
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    How to define the input power for LDMOS transistor?

    I want to see the optimum load of LDMOS transistor with load pull. But how to define the input power? How much should I use for input power?
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    how to obtain negative resistance for VCO oscillation?

    I just try to simulate the transistor with common base topology with inductor as feedback in base in order to get the negative resistance which means make K<1 and S11,S22>1. But I don't know what the correct way to optimize the transistor to get the negative resistance. This is the normally...
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    how to measure the negative resistance of CB topology of VCO

    is it possible to measure a negative resistance How to measure the negative resistance of CB topology of VCO by simulation of ADS? I simulate for oscillation condition for my common base topology VCO in ADS with osctest. I don't know what the zo in osctest means. normally zo in osctest...
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    The condition for start up of oscillation

    It seems very complex to understand the condition for start up oscillation. I found the comment in ADS tutorial: It follows from the Nyquist criterion that the presence of poles in the right-half plane and the system instability can be determined by the encirclements of point 1+j0 by the...
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    CMOS inverter or BJT inverter?

    Thanks. I just draw it in error. Sorry Added after 5 minutes: why BJT inverter is a bad circuit? it is said that if bjt circuited designed for inverter, it should be one bjt transistor connected to a resistor in collector node
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    CMOS inverter or BJT inverter?

    bjt inverter I would like to know why cmos inverter is popular. Why never use BJT inverter?
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    Quintplexer technical issues

    quintplexer The communication module is designed for machine to machine communication including PCS, CELL and GPS band. The RF frontend is using Quintplexer solution connecting PCS tx and rx chain, CELL tx and rx chain, GPS rx chain and antenna, therefore totally 6 ports. Right now I want to...
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    how about the PHD studying in RFIC direction in U of Hawaii?

    I will go to University of Hawaii to persur for PHD studying in RFIC and RF front-end design. How about this research direction in University of Hawaii? Is it easy to find RF job in US after graduation with PHD degree?
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    What is production spread mitigation techniques?

    Does anyone know production spread mitigation techniques?
  12. S

    cable network characteristics

    Does anyone know how on cable network characteristics and specifications such CTB, CSO, CNR, XMOD?
  13. S

    what should be concern regarding stability and linearity?

    for mmic pa design. how to design for increase stability and high linearity of pa? what is the main concern and primary method?
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    Design for thermal spreading for power amplifier

    I need the tips or recommendation for design for thermal spreading of power amplifier
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    MMIC design flows, LVS, DRC

    does anyone know MMIC design flows, LVS, DRC?

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