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Recent content by sammyt09

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    Opamp with CMIR down to 0V

    Hi, I would like to create an opamp with a common mode input range down to 0V? It does not have to be rail to rail, but does have to operate down to 0V. Is is possible to create such an opamp using, for example, a two stage opamp, with pmos diff pair? If not, can somebody please point me in...
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    CIC filter bitwidth question - Hogenauer

    hogenauer Hi, I have designed a 3rd order CIC filter. However, the bitwidths I require for each of the integrators appear to be much bigger than I anticipated by calculation. The filter can be summarised as: Over Sampling Rate (OSR) = 512 Differential Delay (D) = 1 Order = 3rd order The...
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    Delta sigma modulation using verilogA (and Cadence)

    2nd order delta sigma modulator Hi stefannm, Thanks for your input. With regards to your questions: 1) No, I was simply performing the FFT over the entire 100ms transient response. How will not having an integer number affect my result? 2) Yes, I was using a hamming windowing function...
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    Delta sigma modulation using verilogA (and Cadence)

    what is a delta sigma modulator Thanks safwatonline, I think that may be the case. However, it has made me think that perhaps I am measuring the "SNR" of the output spectrum incorrectly. I dont think it is appropriate to simply perform an FFT on the output signal. Anyone have a suggestion...
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    Delta sigma modulation using verilogA (and Cadence)

    best fft window delta-sigma Hi safwatonline, Thanks for your response. I have not strictly measured the SNR of the input as it is a perfect sine wave (200Hz) with amplitude +/-1V. Why do you ask? Perhaps I have missed something obvious here? Thanks again sammyt09
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    Delta sigma modulation using verilogA (and Cadence)

    delta sigma modulation Hi all, I am having some problems with the verilogA simulation of a second order delta sigma modulator. I would be very greatful for any assistance. I took the 'sigmadelta_1storder' cell from the Cadence 'ahdlLib' and modified it to be 2nd order. The resulting verilogA...
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    Delta Sigma ADC - Latched Comparator Testing

    delta sigma adc Hi erikl, Thanks for your response. I have implemented this latched comparator purely in a schematic form at the moment. Ultimately, what I am looking for is a testbench in which I could gather all the important information about the comparator (preferably in one go). I would...
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    Delta Sigma ADC - Latched Comparator Testing

    latched comparator Hi, I wonder if somebody could please be of help? I have implemented a latched comparator, which is part of a delta sigma ADC. I am currently testing it to validate it's performance. I am running the Cadence ADE environment. So far, I have only done transient analyses to...
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    Verilog code for sinc3 filter - 2s complement question

    average verilog code Hi FvM, Once again, thanks very much for your response. It is much appreciated. I will look into the reference you provided me with and also take note of your suggestion with regards to bipolar +/-1 coding. Best regards sammyt09
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    Verilog code for sinc3 filter - 2s complement question

    sinc filter verilog Hi FvM, Thanks kindly for your reply! Just to put this in context, I have currently implemented this filter into a VerilogA model. I am using this model in the absence of having an actual Verilog simulator available. So, I suppose, you could say I am using an ideal filter...
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    Verilog code for sinc3 filter - 2s complement question

    sinc3 Hi Wade, Thanks very much for your reply, it is much appreciated. It seems I have simply made an error in my interpretation of this code/comment. This now makes much more sense and lines up with my original understanding. Thanks again sammyt09
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    Verilog code for sinc3 filter - 2s complement question

    sinc3 filter Hi, I have a brief question relating to some verilog for a sinc3 decimation filter. In the code, I believe 2s complement is being used for the accumulation process, however, I cant quite understand what is going on. As I do not have a verilog simulator at the moment, I am hoping...
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    Create spectre netlists using a script

    Hi jecyhale, Thanks very much for your reply, however, this still does not really help. The script saved by ADE defines the location of the spectre netlist. What I want to do is have a script which actually creates this spectre netlist. My aim is to: 1. Create a spectre netlist from a...
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    Create spectre netlists using a script

    create spectre netlist Hi, I wonder if anybody could please help? Does anybody know if it is possibly to create spectre netlists automatically using a skill/ocean script? Currently, to create a spectre netlist, I have to run up ADE and then manually do: -> Simulation > Netlist > Create...
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