Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Sir
I have solved the issue..actually in the mbist inserted netlist there was an extra tap system for mbist and dft stuffs..I constrained the main inputs of that tap..such as tdi tms trst (data_in,mode_select,reset respectively).Now the extra ports problem got over and successfully created the...
Hi Sir,
But the problem is when I tried to create an hierarchial script by constraining the DFT_SIGNAL(in my design TEST_MODE)and tried for automated script,it said some modules are skipped because of extra output ports.since those module has MBIST cells surrounding.Because of that constraint...
Hi all,
I'm doing logical equivalence check between
1)RTL n MBIST inserted NETLIST
2)PLAIN NETLIST without MBIST n DFT stuffs vs MBIST inserted NETLIST
TEST_MODE is a top level pin of my design which when 0 makes the design in pure functional mode.My design is very...
Ya I understand,but the thing is the same spram16k_16 instantiated as idatamemory of anaother dsp has no issue...the connection and instantiation are the same for both....
Sir,
Actually the thing is,I have 1 instantiation named IDataMemory in which spram16k_16.v memory library is instantiated.Since spram is a memory library the tool blackboxed it.
And the un equivalent bb is the IDataMemory.I couldnt find what exactly is causing the mismatch.Can u please be more...
Sir
The datamemory is instantiated with one spram library memory module..I add notranslate to spram and still I got 1 non equivalent black box after comparison..Still that datamemory is the blackbox and 1 input pin of it shows mismatch.Can you please be more specific?Since Im a fresher I face...
Hi
Now I resolved the aborted points issue,it was the multiplier problem..I used (analyze abort -compare) command and resolved it
I have tried- report black box-but the black boxed things are spram16k,dpram and the mismatch is not that.When i went through non equivalent blackbox that non...
1,Can you please tell me how to figure out that why they have blackboxed? Will blackboxed modules cause any functional mismatch??How can I resolve un equivalent blackboxes(that are not user defined,its tool defined)?
2,What are those NA in the schematics(in the case of abort points)...
HAI ALL,
Can anyone help me please........
I have started my career just 4 months back,I'm doing the functionality check(rtl vs netlist) for the first time and using CONFORMAL LEC tool.
I have used hierarchial comparison and have 3 doubts at present
1.After comparison I got some abort...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
