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Recent content by Ricewind

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    LVDS galvanic isolation

    Hello, I currently need to connect two different devices (twisted pair clabe, more than 10 feet) with LVDS signals. I would like to know how a safe galvanic isolation can be implemented with higher data rates than the 150 Mbps shown in the AN-1117 of Analog Devices. Has anybody experience in...
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    Personal and components safety in a home lab

    I have a switched DC supply. Could it be something like this or is there any other (more economic) alternative? https://www.amazon.de/Trenntransformator-230-V-500-W/dp/B0067K0ESA/ref=sr_1_1?ie=UTF8&qid=1346269088&sr=8-1 I work on a pretty wide range of applications, from FPGA design for DSP...
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    Personal and components safety in a home lab

    Hi folks, I will start making some hobby projects in a home lab of mine... of course, away from the controlled environment of a well set-up lab, I have a couple doubts about safety: - The whole floor in my home is carpet, a nice source for static i guess. I have a little ESD mat on my working...
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    Synchronizing remote clock signals

    Hallo, I have to work with an indeterminate amount of PCBs in synchronisation. These PCBs generate some RF signals which have to be synchronized and such thing is done through a synchronisation of the clocking signals. The main challenge is that they are 25 MHz clock signals which are pretty...
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    DAC for FPGA-DDS? DAC selection

    Hallo, I am trying to implement a DDS in my Spartan 6. The DDS is: https://www.xilinx.com/support/documentation/ip_documentation/ds794_dds_compiler.pdf the problem I get is trying to understand which DACs do I need to select in order to use the results of such a DDS in the analog world. I will...
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    [MOVED]Problem dealing with 4 layers in Eagle

    I copy here the answer given to me by keith1200rs, if it can help anyone further
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    [MOVED]Problem dealing with 4 layers in Eagle

    no doubt, at selecting "show" only the right vias are highlighted with the polygon
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    [MOVED]Problem dealing with 4 layers in Eagle

    That´s it, the plane shorts all the vias... i do not know really why is this. I opened a new project and did some proofs and they are alright. The only difference I see is that, at placing vias, it appears this coloured circle within the vias (blue in the image). When selecting "show", I see...
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    [MOVED]Problem dealing with 4 layers in Eagle

    I have recently moved to design a 4-layer PCB due to the needs of the project I am doing. The thing is that I get a little problem when I want to do some planes for the ground and supply signals in the inner layers. When I do the polygon and click the ratsnest button, the copper covers all the...
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    Operational amplifiers for RF

    The only problem with the current-feedback is that I need to give different gain values to the signals I want to add. It is not enough just to amplify the difference or addition of them, but also of them having different gain values. Is there any way to do this with a current-feedback?
  11. R

    Operational amplifiers for RF

    Hi, I intend to work adding different sin waves at RF badwith (10-100 MHz) but I am not very familiar on how to select an OA for this task. I see on the internet OAs with 100 MHz bandwith and slew rate of 750 V/us... but I guess these parameters have to be taken as absolute maximuns and thus...
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    Problem with amplitude of DDS output

    At now I am just using the debuging software that ADI provides in an evaluation board. I use a 27 MHz oscillator with a multiplying factor of 18, thus the clocking signal is 486 MHz. I have already seen the possibility of being the lowpass filter the responsible of such behavior but it does...
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    Problem with amplitude of DDS output

    Hello, i am currently using a AD9959 DDS in order to generate various control senoids for a analogic circuit. The problem I find is that the output amplitude varies depending on the frequency I set. For example, I get 2.85 Vpp at 55 MHz and 554 mVpp at 20 MHz. I know I can make the output...

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