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I am using an ADC of 12 bits, but the output bits are multiplexed in 2x6 format and only 6 bits are at the outputs. How can I read / or combine the bits in Verilog?
hi guys,
i want to interface SDRAM IS42S16160B with vertix 5 FPGA. we want to write data on SDRAM and then read it back, but we are facing some problem. Here is a part of code which we have written.
we need some help. Regards...
layout of two trnasistors M1 and M2 ,3 fingers each.how can i layout these transistors using common centriod technique?is there any rule in common centriod technique regarding no of fingers of transistor (even or odd no)?
LM1881 generates composite sync, vertical sync, odd/even and back porch sinals. The back porch is very different from composite blanking signal. How can we use back porch instead of composite blanking?
Hello all,
I have some questions regarding Layer and Planes, I hope you will patient to read them and then answer them with patience.
1. I have designed a digital board with 6 internal layers and 2 power planes. I've further splited the Power Plane into 5 Power supplies. and the ground plane...
Hello Folks,
Does anybody has the following book,
Signal Integrity Issues and Printed Circuit Board Design By Douglas Brooks
if yes please can you upload it.
Thank you
Regards
tektronix 3052 manual
I need service manual for Tektronix 3052 Spectrum analyzer.
Details: Tektronix 3052 Spectrum Analyzer
DC to 10MHz
Digital Signal Processing System/Spectrum Analyzer
Applications include Communications, Signal Analysis,
Radar Signal Processing, SATCOM
Picture:
Thanks
I'm also having the same problem, but with different error.
In my case when I try to open the DSN file in Specctra, it flashes and closes. very strange behavior.
Thank you ep20K, I got it. the format of gerber was for ALLEGRO. I downloaded the pcb viewer and was able to open the file.
Can you tell me one more thing please, why can't I open my Protel DXP design in SPECCTRA. When I want to open the design, SPECCTRA flashes and closes. what could be the...
Hello all,
I have seperate power suppllies for the Virtex-5 (XC5VLX30-1FF676) and the rest of the board.
* Should I insert a seperate PLANE for the Virtex-5 or should I just split one PLANE for the all the board.
* How does the thickness of the layers and planes effect the...
Hello all,
anyone having this paper? I shall really be greatful. thank you
Signal Integrity Techniques for Platform FPGA Design
best regards
Added after 1 hours 28 minutes:
The Auther is Dr. Howard Johnson. thank you
Layer stacks
Hello All,
Can anyone tell me about the layer stack. for a 12 layer board, what is the best layer stack.
what should be the thickness of the layers. how many planes are recommended and in what order?? and other recommendations and guidelines ... thank you
regards
Hello House cat,
>>Do you have a board outline defined on the keepout layer?
yes i have a keepout track on the keepout layer.
>>Are you using an old version of Specctra with a newer version of P*otel?
I'm using Specctra 9.0 and Protel 2004 (protel DXP)
>>Have you set up reasonable...
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