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reading from multiplexed ADC 12bit ( 2x6)

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qasmi

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I am using an ADC of 12 bits, but the output bits are multiplexed in 2x6 format and only 6 bits are at the outputs. How can I read / or combine the bits in Verilog?
 

I think you can flop the results, combine with the next result, and stick it in a fifo every other clock.
Wouldn't that work?

Terry
 

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