Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by psurya1994

  1. psurya1994

    Implementing FPU on FPGA using Verilog

    Thanks! That helped! :)
  2. psurya1994

    Micro-controller for beginner

    Hi Asgar, You can start learning with Jeremy's Arduino tutorials at https://www.youtube.com/playlist?list=PLA567CE235D39FA84
  3. psurya1994

    Implementing FPU on FPGA using Verilog

    Thanks Jrwebsterco. Can you please provide me with the resources to learn more about the tradeoffs you mentioned. I'm planning to follow this block diagram, where I will implement each of the block take different number of clock cycles. Is it necessary to introduce buffers between each of them?
  4. psurya1994

    Display while counting

    Hi Ivan, You can use a NOT logic, so if the forward counting is 0000,0001,0010,0011,.... the reverse counting would be 1111,1110,1101,1100. The 74LS04 IC which has 6 NOT gates might help.
  5. psurya1994

    Implementing FPU on FPGA using Verilog

    Thanks for the reply. Why do we need so many clocks? Why can't we implement it in three clocks for addition? 1. Compare and Shift 2. Add mantissa 3. Normalize output
  6. psurya1994

    Implementing FPU on FPGA using Verilog

    My professor at college told me that he will make sure we publish a paper, if we implement a FPU with addition, subtraction, multiplication and division. Everything I'm doing has already been implemented before. For a typical FPU, how many clocks does it take for various operations? Is it one...
  7. psurya1994

    Implementing FPU on FPGA using Verilog

    Thanks! That helped! I'm looking to publish a paper after implementing this on an FPGA, after suggestions/comments on that?
  8. psurya1994

    Implementing FPU on FPGA using Verilog

    Is it possible to implement a Floating Point Unit (FPU) (Single Precision IEEE 754 format) on an FPGA which can do all addition, subtraction, multiplication and division? If yes, which algorithms would be good for multiplication and division? I'm using Xilinx IDE.
  9. psurya1994

    Serial Communication using Android.

    I dont know much about TCP/IP programming. The project I am working on is: 'Establishing serial communication between Android and Arduino'. So i though it would be good to start by connecting Android and Laptop via the com port.
  10. psurya1994

    Serial Communication using Android.

    Thank You! My laptop doesn't have Bluetooth. I want wired serial communication with android. Yes, I want to send keystrokes, receive them in processing to perform corresponding actions. I want to get this done, which my android device is connected through the USB port of my laptop. Can I...
  11. psurya1994

    [Moved] i want to control 3 stepper motors

    You can do it by giving a delay only after the three motors have taken a step. For example, your code should look like this, motorOneStep(); motorTwoStep(); motorThreeStep(); delay(100); Surya
  12. psurya1994

    Serial Communication using Android.

    Can my laptop and Android Nexus tablet, communicate serially? Is there any application which can do so? Can I run the processing software by receiving data serially from Android?
  13. psurya1994

    propagation delay of cmos inverter

    I don't think you need to multiply the time delay by two as you have two edges but I'm not sure. - - - Updated - - - I don't think you need to multiply the time delay by two as you have two edges but I'm not sure.
  14. psurya1994

    propagation delay of cmos inverter

    To be accurate, it depends on the number of inverters you are having. Let us assume you have 'x' inverters. You know f = 1/T. So the maximum operating frequency = 1/(5ns*n) = (200MHz/n). So if you have 2 gates, the maximum operating frequency is 200MHz. Hope you got the point. :)
  15. psurya1994

    How does calloc work in C code?

    Re: A C Code to Decipher In the statement: if (!(pred = calloc(1, sizeof(struct bpred_t)))) calloc: You can see how calloc works here: https://www.cplusplus.com/reference/clibrary/cstdlib/calloc/ bpred_t: ftp://ftp.mcs.anl.gov/pub/alice/10x10/sst-2.1/doc/html/structbpred__t.html - - - Updated...

Part and Inventory Search

Back
Top