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Recent content by patan.gova

  1. P

    Removing settling time of a signal

    Hello FvM thanks for your suggestion.I tired using IN4004 diodes across both the 47K resistors but the startup time is still the same(the usage of diodes not removing the startup time). Can I get anymore suggestions regarding this startup time. thanks.
  2. P

    Removing settling time of a signal

    Can someone suggest me a way or methods to minimize the startup for this circuit https://embedded-lab.com/blog/?p=5508
  3. P

    Removing settling time of a signal

    Hello, Can someone suggest me the modificatiosn needed in the circuit to minimize or remove settling time. Thanks.
  4. P

    Removing error popup in LTspice

    can someone help with correcting this error.
  5. P

    Removing error popup in LTspice

    Hello, I am gettiing some error popup in LTspice as shown in the attached image when I tried to simulate the sallenkey bandpass filter combined with: a) sallenkey HP filter with fc=0.4Hz **broken link removed** b) sallenkey LP filter from here with fc=2.4Hz **broken link removed** Can...
  6. P

    Removing settling time of a signal

    Hi SunnySkyguy , I am using the circuit as here https://embedded-lab.com/blog/?p=5508 Can I get your suggestions of how to modify this circuit to remove or minimize the settling time. thanks.
  7. P

    Unable to judge the correct pin configuration of OPA333

    Can someone help me out in finding the correct pins?
  8. P

    Removing settling time of a signal

    Hello, Now,I am planning to improve the working circuit design by minimizing the settling time.I really want to minimize this settling time. @FvM :Can you explain me what kind of special design is needed to minimize the settling time. Thanks.
  9. P

    Unable to judge the correct pin configuration of OPA333

    Hi erikl, No,the OPAMP doesnt have the indicator shown in both the images but it has something like this **broken link removed** Can I know how to proceed ?
  10. P

    Unable to judge the correct pin configuration of OPA333

    Hello, I got an OPAMP sample with 8-pins from TexasInstrument labelled on the package as "OPA333AID" and DESC: IC OPAMP 8-SOIC (The datasheet is attached below) .On the OPAMP chip I got is lablelled as "O333A35K C651G4" and there is no point on the chip that actually indicates the pin1 as it is...
  11. P

    Working of two similar filtering stages

    Hello Audio guru, Thankyou for your explanations and suggestions. Now I am clear that the two stages don’t provide sharp cutoff frequency and there is need to use another type of filter. 1)Can you please explain me the steps to build a new filtering stage (that replaces the two stage filtering...
  12. P

    what Undesired frequencies are allowed if the filter response is droppy

    I really didn't understood of what frequencies are allowed that fall outside limit of 0.7 to 2.34Hz. Can you pelase explain a bit on about this. Thanks.
  13. P

    what Undesired frequencies are allowed if the filter response is droppy

    Hello, The circuit here https://embedded-lab.com/blog/?p=5508 uses simple filters of highpass and lowpass for limiting the frequencies within the limit of 0.7Hz to 2.4Hz.But can someone explain me the below 1)what are the lower frequencies that are allowed below 0.7Hz, if the filter was...
  14. P

    Working of two similar filtering stages

    can someone please tell me a software/tool to practically(with the simulation results) understand this difference in -3db cutoff frequency( and the 40 dB/dec roll-off instead of 20dB/dec above the cut-off). Thanks.

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