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Recent content by panospet

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    Xilinx System Generator: Virtex II pro, FIR, and sysgen 10.1 compatibility

    Hello, I'm using a Virtex II pro and I want to download a design that includes the FIR block in Sysgen 10.1. As far as I can see here **broken link removed** it says that Sysgen 10.1 includes support for Virtex 2 boards and FIR Compiler 3.2. Unfortunately, when I try to generate a bitstream...
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    Xilinx system generator for dsp upsample/downsample blocks not working: virtex II pro

    Hello, This is my pitch shifting effect implementation , tested and working correctly, during simulation in simulink. But when I download this in my xup virtex ii pro board, it seems that the upsample/downlsample blocks that I used do not work. My output sounds exactly like it is before these...
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    Resample in Xilinx System Generator?

    Any ideas of how can I implement the "resample" MATLAB code in a xilinx system generator design? I want this to implement the pitch shifting audio effect. For any other questions I'm glad to answer. thank you in advance. panospet

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