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Recent content by naveensai12

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    sample hold circuit help

    well i will design an opamp and will post the results for u tomm ....i will build a S/H using it and will post the result tomm
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    sample hold circuit help

    yeas that was an ideal opamp......i would like you to answer one question for me .....isnt it enough if the i/p CM for opamp is set ,should you always short the o/p to CM after every cycle .... i have this idea..first the cap samples ,at this time just connect the i/p to the o/p thus having the...
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    Analog VLSI circuits doubts

    the biasing for the circuit can be found in CMOS book by Baker .... 1)Slew rate enhancing is done to charge up the ckt o/p faster .....in SR mode the current from the TX charged the o/p and after a specific voltage is reached the normal operation of TX in saturation mode kicks in .......So if...
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    sample hold circuit help

    well the opamp has good PM ....can u use a single stage instead of 2 stage amp ......is there a specific reason for using 2 stages like o/p swing???what is the gain you are aiming at ??? ths S/H gets reset every cycle after transfer of charge ......can you use a S/H which doesnt do that...
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    sample hold circuit help

    well the opamp has good PM ....can u use a single stage instead of 2 stage amp ......is there a specific reason for using 2 stages like o/p swing???what is the gain you are aiming at ??? ths S/H gets reset every cycle after transfer of charge ......can you use a S/H which doesnt do that...
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    sample hold circuit help

    Is the opamp you are using a ideal one? Can u post a pictures of your cadence circuit.the output seems be wrong .when you sample a sine wave you might get a different output if your opamp doesn't reset.normally to reduce ringing we reduce the phase margin of it to get smoother output
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    sample hold circuit help

    just for confirming -Are you using nonoverlapping clocks ???? and also if you are using this ckt in cadence ,are you using ideal components ??? and if so what library are you using ?? 50MHz is small frequency if we design the opamp designed is good ....
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    sample hold circuit help

    What is you sampling rate ?And having an opamp in openloop is really not good in practical situations .it is advicasble to have it in closed loop always .can you post the i9mages of the i/p and o/p waveforms you are getting ?
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    Analog VLSI circuits doubts

    5)VGS is DC bias given and this bias determines the region in which the ckt. operates.It will have current which might be be similar to exponential current in a diode and it behaves like a resistor in that region . 1)mosfet amlifies only AC not DC 2)When there is a high freq component it will...
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    Relationship between OTA gain vs f3db

    The Gain * bandwidth of a opamp is constant .So if you increase the gain the BW /f3b will decrease .You can look into any book which deals with OTA and you will understand better .
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    Analog VLSI circuits doubts

    2)No 3)L should be same for all the Tx .We should try using the min L .This is because the area of the Chip reduces and less chip are is less cost to consumers .The longer L are used only in ckts where noise should be less .but preferably the Lmin should be used .. 4)There can be error depending...
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    Design of differential amplifier (NMOS) using Current Mirror (NMOS)

    What is the DC voltage input level of the Diffamp.It should be more than Vgs from the ground.So you can go with 1v as the DC level of the input signal
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    opamp in the cyclic adc

    Can you please post the MDAC structure you are using ???
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    sample hold circuit help

    This is commonly know as Flip around S/H structure .The circuit should work if you use non-overlapping clocks and charge injection will only result in error voltage at the output but the output will surely come as required .
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    What is bandgap reference generator and why do we need it in the circuit?

    BGR are mostly built into the IC.The BGR functions in such a way that it accounts for the change in temperature of the chip and the voltage from the BGR remains constant inspite the change in temperature .Here when u tell voltage source ,do you mean external voltage source ???

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