Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by maha_66

  1. M

    BRAM based FIFO buffer for matrix multiplication

    Thank you for the help. So does this mean every time I infer a BRAM for a project, I need to instantiate a FIFO using the methods suggested? I will be sending data to a UART transmitter to send to a host PC. Can I send data from the bram_fifo module to a UART TX?
  2. M

    BRAM based FIFO buffer for matrix multiplication

    Hello! I am currently working on a matrix multiplication project. After performing the multiplication of the matrices, I am trying to build a module that can write to memory and can be read from by the UART TX module to send to host pc. What I don't understand is how does inferring a BRAM make...
  3. M

    VHDL Matrix Multiplication using UART and BRAM

    Thank you for making it clearer. It does not involve decimal formatting. Hex format is acceptable.
  4. M

    VHDL Matrix Multiplication using UART and BRAM

    The questions I asked were mainly to validate whether I was thinking in the right direction. My main concern was how do I accept input from terminal as a single string that define the num. of rows and columns of two matrices. I do not need your insight on how much effort I have put in. You can...
  5. M

    VHDL Matrix Multiplication using UART and BRAM

    My project involves performing matrix multiplication in vhdl. The two input matrices (8 bits each) are sent using a terminal and received via UART Rx. The FPGA device receives data and operates (add or mult) on the two matrices and sends back the output (16) using the UART Tx and the output...

Part and Inventory Search

Back
Top