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Recent content by ls00722

  1. L

    Unique ID/SN on each IC

    I understand that. But in all of above solution, does the manufacture has to program the SN into the eeprom/OPT? imagine, if there are millions of chips taped out, they have to power up each chip, and program the OPT? I am wondering if the fab has a way to etch different number into each chip...
  2. L

    Unique ID/SN on each IC

    Hi : Assume I am designing an IC that will be in mass production, each chip will have a unique 32 bits ID. Apparently that has to be done by manuafacture, how will this be considered in RTL design phase? and how the manufacture will do it? I only got experience on modeling an ROM, using...
  3. L

    what does this verilog HDL statement mean?

    Hi: I am a beginner on VerilogHDL, what does the following statement do? reg sum_out_shift[25:0]; reg sum_out_sat[7:0]; sum_out_shift <= {{18{sum_out_sat[7]}}, sum_out_sat}; Sign extending the sum_out_sat? Why "<=" sign was used , not the "=" sign? Thanks chris

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