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verilog spice translator
spice netlist is required when using powermill(synopsys) to analyze power of the chip.
in Calibre, one command v2lvs is one way.
in panda, one command ver2cdl is another way to convert.
but, top module of the verilog netlist includes some IP which has no spice.
thanks...
spice netlist is required when using powermill(synopsys) to analyze power of the chip.
in Calibre, one command v2lvs is one way.
in panda, one command ver2cdl is another way to convert.
but, top module of the verilog netlist includes some IP which has no spice.
thanks for your suggestion!
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