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Recent content by lawrence_idol

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    verilog, rs232 btw PC and FPGA

    verilog+rs232 It is not hard to program your device by interfacing with RS232. First of all, i agree wat KHaila has commented you. if you want to learn more you can do some research on UART (Universal Asynchronous Transmitter/ Receiver).
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    How to use FPGA to display signal from GPS module

    Re: FPGA help!! Can you please state clearly of your project title. wat is the application of your project. wat is the problem you face in this project.
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    graphical state machine editor.

    State machine design is fun and is challenging... somehow i do not seen any GUI for designing state machine. please do not jump steps when you are in learning status.. you will regret in the final.
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    Help me with a VHDL project with 16 input & output seque

    Re: help for vhdl project hi, learn Finite State Machine (FSM) design coding.. merge your design with multiplexer, multipler, and register as well.. the clear concept only comply when you really understand the theory above. regard lawrence
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    Synthesizing Matlab code to FPGA

    Re: Matlab to FPGA hi echno and rsinivas, My project locked into FLex 10k DEVICE which has 1152 LE and 2304 LE for UP2(another flex10K). what i think is.. even this is an old device but i still can try my best implement a filter with it..a design vision. My project never state any filter...
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    Synthesizing Matlab code to FPGA

    Re: Matlab to FPGA hi rsrinivas & echo, Thanks for the solution both u guys providing.. it really helps.. the VHDL code which generate from matlab is synthesizable by ALTERA quartus 2, however, it has more than 512 warning of the Fann in problem for just a minimal 4th order FIR equiripple low...
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    Synthesizing Matlab code to FPGA

    Re: Matlab to FPGA dear echo, really thanks for your rapid reply. i really appreciate that.. :) i would try to synthesize by your comment.. do you have any research paper/ study regarding to fix point and floating point arithmetic?? i would be great to have that for me.. thx best regards always.
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    Synthesizing Matlab code to FPGA

    Re: Matlab to FPGA rsinivas, have you try the matlab to generated VHDL code and successfully implement to ALTERA devices? coz it is multiple error and i attach the code for you to see.. the code i have attached can you help me to synthesize by quartus..
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    Synthesizing Matlab code to FPGA

    fda tools user matlab FROM ECHO {Did you examine the VHDL code to see what was causing the error messages? Maybe there's an easy fix. Be sure you haven't done something silly, such as requesting floating-point arithmetic (that's the default). rectifier, which "steps" are you referring to...
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    Design FIR Filter In AHDL

    hi, you can go to www.altera.com find the category of example.. download AHDL example of multiplier and adder i think they have 1 or 2 filter example.. all the best
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    Definition of setup and hold time

    Re: setup and hold time hi, go download section, find books from ewe meyer dsp on fpga then you will learn more ALU, Floating point system on DSP cheer
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    Looking for Protel 99SE software

    Re: pcb design software i got the software.. please email me if you still want it lawrence _ idol @ yahoo.co.uk
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    error in VHDL -real???

    vhdl convert to real hi all. i face the same problem while synthesis by generated VHDL code by mathlab toolbox fdatools i think this is kinda bug for Matlab synthesis with Altera quartus software.. can anyone provides solution.. remarks. those solution posted in this page.. ive tried before...
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    VHDL explained with circuit

    floyd digital vhdl ebook Hi, i would like to suggest a good books which every one in the EDA forum would know VHDL programming by example by perry douglas pls refer to ebook download /upload sections best regards
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    Synthesizing Matlab code to FPGA

    matlab on fpga hi all, i have tried by using matlab;s FDA tools for generating VHDL code however, it isn't compatible with ALTERA quartus.. it shows various error.. Have you guys heard there is another software call OneOverT by tyder. ltd it is a powerful tools which can generate VHDL code by...
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