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Hi all,
Needed some pointers.
Jitters - We have measured some LVDS clocks of around 2.5GHz and through the oscilloscope we are able to getting statistical measurement like these below -
Jitter (peak to peak) (ps)
Jitter (6 * delta) (ps)
N-cycle jitter
Cycle to Cycle Jitter
Question - How do we...
Hi all,
Just to close this topic. There are two cables interconnecting both boards. One cable consist of 60 single ended lines and the second cable consist of 8 pairs of differential signals. It seems the data rate is back to it's designed maximum (800MB/s) after BOTH cables are connected.
It...
Hi Kaz1,
The operation when it is stacked and when it is connected with cable are the same. As such, there is no change in the pins that are driven and those that aren't.
However, I think you have a point there which I would want to try. There are about 10pins on the 60pins connector that are...
Hi all,
Our system has two boards which are stacked on top of each other through a 60pin connector. The board at the Bottom consist of a simple 8 pin microcontroller which controls some peripherals. The Top board consist of the Ultrascale+, LPDDR4 (MT53D1024M32D4DT), Flash and power regulatory...
Hi Klaus,
Thank you for the comment. Let me give an example.
Assuming I am connecting a single output from 74LVC8T595 (master) to input of several 74LVC8T595 (slaves).
The datasheet of 74LVD8T595 implies the below -
1. Maximum output load capacitance of 30pF
2. Maximum input capacitance of 3pF...
Hi all,
Is the maximum load capacitance in any way related to the configurable drive strength on output pin?
This is what I understand -
1. As long as the total output capacitance of input pins are below the max capacitance of the output pin, the AC specification of the chip will be valid.
2...
Hi FvM, would be great if there is any documentation that says about the 20 inch critical tracelength. So far, different suppliers has a range of different critical length. Unfortunately, the Xilink Ultrascale+ does not provide any. What we would like to know is just how far we could route the...
Hi Brad, thanks for responding.
Looks like I could not get verification from anyone on the above connections and the corresponding questions.
Would need to search elsewhere. Thanks. again.
Hi,
Would like some information on the topic above. The ug583 does not have any such information. Xilink forum is not accessible.
In addition, what would happen if the tracelength is exceeded? Is there any way to reduce the transmission speed?
Many thanks.
Best rgds,
KAKIITEK
Dear all,
Would like quick confirmation of the connection method below. Pretty confused with USB3.0 especially Type-C.
Figure 1 is the our attempt in connecting to a USB3.0 Type C.
Questions - Are there any chips that will combine both the Mux/De-mux and Channel Configuration Logic into a...
Yes, verified that. It is a clean 1VDC at 1kHz frequency.
1622623743
Currently all measurements is made by disconnecting the regulator from onboard load and connecting the regulator output through three feets of wires to an external electronic load. With all the clips and dangling wires, it will...
Hi Guys, many thanks for the suggestion, but I could not provide such details at this point of time. Understand that it will be difficult for you to help me without such information. My apologies.
One last question though, by bandwidth limiting the oscilloscope to 20MHz, the spike could not be...
Hi all,
Many thanks for the response.
The probe is good. The overshooting occurs when I am loading the regulator above 1.0A. The circuit has no issue providing a stable Vout up to 5.0A with minimal ripple. But of course, the same spike is shown at Vout as well. Attached is the latest scope...
Hi all,
I have configured a buck converter TPS53319 for the conversion Vin=16V to Vout=0.70V. We will be drawing a maximum of 5A.
While the output ripple is within expectation <50mVpp, we observed a pulse at both the Vin and Vout. This pulse is about 600mVpp at Vin and 80Vpp at Vout. The pulse...
Yes, will simulate that using LTSpice. But would be good if there is some form of quick calculation to be able to judge if that group of capacitors with the respective SRF would be able to work on a certain regulator switching frequency.
Many thanks!
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