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wire area
A wire load model helps, but eventually it is decided by the P&R tool and your floorplan.
Also, you should worry about the certain instantiated modules, if there are a lot of congestion then it is better to resolve it from RTL phase.
Sorry, Aravind:
It is just a test.
Well, the target lib is from your vendor, the symbol lib is from DC, should be inside your DC folder, the link lib is the addition of both target lib and the core, the pad and anything else you have used in your design.
Jing
Hello, Vonn:
You have NOT set your link library and symbol library to point to the correct paths. Check with your UNIX path that stores 'your_library.sdb' and 'your_library.d
Jing
Added after 2 minutes:
OK, Vann:
in UNIX, cd to the path where your libraries are stored, and pwd, you will...
AMBA Question?
Hello, Billjoy:
AMBA is like a local bus, such as Mot860 bus, only it is inside a SoC. DMA is a mechanism to transfer large pack of data between devices that are mapped into memory space.
Very often, DMA is used to access the system memory, such as the DDR SDRAM.
Hope this...
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