Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by icon

  1. I

    How to detect ICs input and output?

    Re: about IC'S Hi For any IC to check the Inputs and Outputs .first I/O interface with outside signal Environment should be traced at Input side and at Output processed data of the full operation of chip is calculated Testing of IC can be for Operating Frequency and Functionality but...
  2. I

    why RTL simulation is slow?

    yes stocking its correct..netlist simulation is slower when compared to RTL.we are discussing about the acceleration/Hardware acceleratoprs for simulation. go thru entire conversation thn u will get an idea
  3. I

    why RTL simulation is slow?

    so let me conclude by saying what i understood is "If u r simulating ur RTL design in simulator it will take some x time(assume ) when u r simulating the same Gate level of the design the simulator will take more x ( i mean to say more time).so when u r applying both the design to your...
  4. I

    why RTL simulation is slow?

    ok thomson.but when we go for hardware acceleratiopn/simulation acceleration we wil get more speed on gate-level than RTL level.why is it so.i am talking about any processor based Hardware Accelerator
  5. I

    why RTL simulation is slow?

    can u tell me why gate level simulation is faster than RTL simulation...i mean in the context of a 12M gate design.
  6. I

    What is meant by maximum operating frequency and how we are calculating it?

    1.what is meant cycles per second in simulators and how we calculate cycles per second 2.what is meant by maximum operating frequency and how we are calculating for a particular design say for an example of 4M gates.
  7. I

    What tools can do code coverage?

    can anyone send me some details of Cadence code coverage ..datasheet
  8. I

    ModelSim SE 6.0 and systemC

    h*****p://www.model.com/support/release_notes.asp********* yes u can run systemC..but before running u have to download the latest version..check i am sending the link ..
  9. I

    What tools can do code coverage?

    Summits HDLScore is a very good tool which is widely accepted D0-254 standard(Mainly for Defense design Flow). you can log into h***P://www.sd.com**** u can download the datasheet and further details from the website
  10. I

    what is the origin of leakage current in transistor?

    Leakeage Current is increasing due to aggressive scaling of MOS device .Due to scaling we have effects like Narrow channel and short channel,gate tunneling ,reverse bias diode leakage ,subthreshold conduction of MOS
  11. I

    What is the difference between ALF and OLA library formats?

    what is the difference between .lib,ALF and OLA library formats.how are they different from each other in characterisation values for power and Timing
  12. I

    Advise me which companies can I check out in Hyderabad

    Re: Need some advice hai, try to approach some of EDA companies like Synopsys,Mentor Graphics and Cadence if strong in C and Algorithms.For Design companies like Alliance,Qualcomm,Qualcore if u are confident in Asic Design
  13. I

    What is fpga and where is it used??

    Re: what's fpga?? FPGA is field programmable Gate Array.it is a semicustom design .FPGA can be reconfigured any number of times.It is preferred when designs are small and volumes of chips required is less.Time to market is very fast,comp[exity supported is less ,Less chance for performance...
  14. I

    What's diffrence between pspice and Hspice ?

    spice is a simulation tool for CMOS Transistors .H spicedoes nt support PCB simulations .it is an simulation tools for different models of transistors. Hspice is more accurate than PSpice . Hspice has more characterisation options like Measure statements,Set up time,Hold time measurements and...
  15. I

    What is False path and how important is it?

    Timing question what is False path .what is it's importance .how the design is affected and how analysis made for false path in design?
See more

Part and Inventory Search

Back
Top