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Recent content by hemanth434

  1. H

    [SOLVED] Test bench simulation

    I'm using ISIM... ERROR:Simulator:861 - Failed to link the design
  2. H

    [SOLVED] Test bench simulation

    my xilinx 13.2 in win 8 pro is not able to simulate... It shows error: Failed to link the design. What could be the problem??
  3. H

    [SOLVED] FPGA implementations of humming bird cryptographic algorithm

    i've completed coding the above algorithm ... I need help to reverse the permutation layer(step 5) for decryption...
  4. H

    [SOLVED] FPGA implementations of humming bird cryptographic algorithm

    Input: A 16-bit data block m = (m0;m1; · · · ;m15) and a 64-bit subkey ki such that subkey ki = K(i)1∥K(i)2∥K(i)3∥K(i)4 Output: A 16-bit date block m′ = (m′0;m′1; · · · ;m′15) 1: for j = 1 to 4 do 2: m ← m ⊕ K(i) j [key mixing step] 3: A = m0∥m1∥m2∥m3; B = m4∥m5∥m6∥m7 C = m8∥m9∥m10∥m11;D =...
  5. H

    [SOLVED] Test bench simulation

    hi this is my code im nt getting any output n tell me how to give inputs in the test bench waveform entity Encrypt is Port ( rs1 : in STD_LOGIC_VECTOR (15 downto 0); rs2 : in STD_LOGIC_VECTOR (15 downto 0); rs3 : in STD_LOGIC_VECTOR (15 downto 0); rs4 ...
  6. H

    [SOLVED] FPGA implementations of humming bird cryptographic algorithm

    Hai folks... Can anyone help me with VHDL coding of 16-bit block cipher encryption in humming bird algorithm????
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