Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by goshka

  1. goshka

    Endianess Transformation

    Linux kernel do endianness transformation by software. This is hardware independent. Linux/include/linux/byteorder/ Endianness - Wikipedia, the free encyclopedia
  2. goshka

    the arm-linux starting procedure!

    GNU Linker Script File: 7. Linker Script File
  3. goshka

    Is keil better or IAR for STM32 (CORTEX M3)

    IMXO, Keil is better for ARM microcontroller. Keil IDE is user-friendly. C Compilers for ARM: Benchmark : https://www.mcu-raisonance.com/tzr/scripts/downloader2.php?filename=T020/file/07/c9/1kmm1akx6gr&mime=application/pdf&originalname=AN52-ARM-C-Benchmark.pdf
  4. goshka

    What does it mean by " Real time systems" ?

    Event proccessing priority. Interrupt processing priority. Fixed system task switch time on event rising, to start event or interrupt handler execution.
  5. goshka

    What is the IOB buffer used for? What is the global line in FPGA?

    Re: IOB buffer IOB is used for By moving interface logic from CLBs to IOBs, You can minimize signal to pin delay. That minimize signal skew within interface bus.
  6. goshka

    Can you use both clock edges in an FPGA?

    You can use posedge clk2. (freq(clk2)= 2*frq(clk);)
  7. goshka

    TRUE RMS voltage measurement

    https://en.wikipedia.org/wiki/Root_mean_square
  8. goshka

    How to calculate a task time in rtos?

    Sett any LPT pin at start task Reset same LPT pin at task return. Oscilloscope must be connected to this LPT pin.
  9. goshka

    How to unrar a file in FEDORA-11?

    Re: UNRAR in FEDORA-11 Install rar rpm. http://rpm.pbone.net/index.php3/stat/3/srodzaj/1/search/rar
  10. goshka

    systemverilog testbench and vhdl

    Re: 1553 source code 1553 mil-std-1553 military standard ?
  11. goshka

    systemverilog testbench and vhdl

    Re: 1553 source code https://www.latticesemi.com/products/intellectualproperty/referencedesigns/1553encoderdecoder.cfm
  12. goshka

    PCIE system - what is "root complex" @ FPG

    Re: PCIE system Look at this project(SOC) system controller. https://www.gaisler.com/cms/index.php?option=com_content&task=view&id=13&Itemid=53
  13. goshka

    assigning a clk with delay. is it possible?

    I have similar problem with active hdl. I clear all compiled project lib data manualy (view-> lib-manager). Recompile project. Problem is removed.
  14. goshka

    generate higher frequencies at the output using fpga

    https://www.xilinx.com/support/documentation/application_notes/xapp132.pdf
  15. goshka

    Looking for information about PCI Core for Xilinx

    post для pci Xilinx core generator work result have example_design_directory && simulation_model_directory. https://www.xilinx.com/support/documentation/ip_documentation/pci_64_gsg260.pdf Loock at generated core result. https://electronix.ru/forum/lofiversion/index.php/t2843.html...
See more

Part and Inventory Search

Back
Top